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LM5007MM датащи(PDF) 3 Page - National Semiconductor (TI) |
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LM5007MM датащи(HTML) 3 Page - National Semiconductor (TI) |
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3 / 12 page ![]() Pin Description PIN NAME DESCRIPTION APPLICATION INFORMATION 1 SW Switching Node Power switching node. Connect to the LC output filter. 2 BST Boost Boot–strap capacitor input An external capacitor is required between the BST and the SW pins. A 0.01uF ceramic capacitor is recommended. An internal diode between Vcc and BST completes the Buck gate drive bias network. 3R CL Current Limit OFF time programming pin Toff = 10 -5 / (0.59 + (FB / 7.22 x 10−6 xR CL)) A resistor between this pin and RTN determines the variation of off time, along with the FB pin voltage, per cycle while in current limit. The off time is preset to 17uS if FB =0V and decreases as the FB pin voltage increases. 4 RTN Circuit Ground 5 FB Feedback Signal from Regulated Output This pin is connected to the inverting input of the internal regulation comparator. The regulation threshold is 2.5V. 6R ON On time set pin Ton = 1.42 x 10 -10 R ON / Vin A resistor between this pin and Vin sets the switch on time as a function of Vin. The minimum recommended on time is 300ns at the maximum input voltage. 7 Vcc Output from the internal high voltage bias regulator. V CC is nominally regulated to 7 Volts. If an auxiliary voltage is available to raise the voltage on this pin, above the regulation setpoint (7V), the internal series pass regulator will shutdown, reducing the IC power dissipation. Do not exceed 14V. This output provides gate drive power for the internal Buck switch. An internal diode is provided between this pin and the BST pin. A local 0.1uF decoupling capacitor is recommended. Series pass regulator is current limited to 10mA. 8 Vin Input supply voltage Recommended operating range: 9V to 75V www.national.com 3 |
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