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LP8725TLX-A/NOPB датащи(PDF) 11 Page - Texas Instruments |
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LP8725TLX-A/NOPB датащи(HTML) 11 Page - Texas Instruments |
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11 / 46 page ![]() EN Buck 1 0 1 2 3 Buck 2 tBON tS Timing Code Timing Code START UP sequence SHUT DOWN sequence is in reverse order of START UP sequence EN Buck 1 0 1 2 3 Buck 2 LDO1 LDO1 LDO3 LDO3 STANDBY START UP tS tS tS tS tS tS tS tS tS tS tS SHUT DOWN STANDBY IDLE Note 3 Note 4 LDO4 LDO4 LDO5 LDO5 LILO 2 LILO 2 LILO 1 LILO 1 4 5 6 6 5 4 LDO2 LDO2 Note 5 Note 5 LP8725 www.ti.com SNVS618G – DECEMBER 2009 – REVISED MAY 2013 Figure 7. LP8725-A Startup and Shutdown Sequence if CONFIG=GND, DEFSEL=VIN1 Note 1, Note 2 All timing is typical. tBON 75 µs - Reference and bias turn ON. tS Programmable time steps. (Typically 64 µs/step.) Time step accuracy is defined by OSC frequency accuracy. Note 1 STARTUP and SHUTDOWN sequences are defined by registers. Sequences given here are valid if there the registers are not rewritten via Serial Interface. Note 2 The timing showed here define time points when LDOs and BUCK are enabled/disabled. Enabling /disabling process duration depends on voltages and loading conditions. Buck startup duration is typically 170 µs. LDO startup duration is typically 35 µs. For details please see LDOs and BUCK Electrical Specifications. Note 3 BUCK1 is disabled. If it is enabled via Serial Interface and the startup sequence is not changed, then it will be disabled, with no delay, from falling edge of EN-pin. Note 4 At this time point registers are reset to POR default values. Note 5 BUCK2 and LDO3 are enabled by B2_EN and LDO3_EN respectively (or via serial interface). If these inputs are high when EN goes high then these outputs turn on after ts= 6. Copyright © 2009–2013, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: LP8725 |
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