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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LP8552 датащи(PDF) 34 Page - Texas Instruments |
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LP8552 датащи(HTML) 34 Page - Texas Instruments |
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34 / 49 page  LP8552 SNVS693E – SEPTEMBER 2011 – REVISED SEPTEMBER 2014 www.ti.com EEPROM ADDRESS 5 REGISTER EN_VSYNC 7 R/W Enable VSYNC function 0 = VSYNC input disabled 1 = VSYNC input enabled. VSYNC signal is used by the internal PLL to generate PWM output and boost frequency. DITHER 6:5 R/W Dither function controls 00 = Dither function disabled 01 = 1-bit dither used for output PWM transitions 10 = 2-bit dither used for output PWM transitions 11 = 3-bit dither used for output PWM transitions VBOOST 4:0 R/W Boost voltage control from 10 V to 40 V with 1-V step. If adaptive boost control is enabled, this sets the initial start voltage for the boost converter. If adaptive mode is disabled, this will directly set the output voltage of the boost converter. 0 0000 = 10 V 0 0001 = 11 V 0 0010 = 12 V ... 1 1101 = 39 V 1 1110 = 40 V 1 1111 = 40 V 8.6.2.7 EEPROM Address 6 Address A6h EEPROM ADDRESS 6 REGISTER 7 6 5 4 3 2 1 0 PLL[12:5] Name Bit Access Description PLL 7:0 R/W 13-bit counter value for PLL, 8 MSB bits. PLL[12:0] bits are used when en_vsync = 1. See EEPROM Address 7 below for PLL value calculation. 34 Submit Documentation Feedback Copyright © 2011–2014, Texas Instruments Incorporated Product Folder Links: LP8552 |
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