TAS3108IADCPRG4 datasheet(32/63 Pages) TI1

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Block Header 1

I2C EEPROM Memory Map

M0040−01

Data Block 1

Block Header 2

Data Block 2

Block Header N

Data Block N

TAS3108, TAS3108IA

AUDIO DIGITAL SIGNAL PROCESSORS

SLES152B – OCTOBER 2005 – REVISED NOVEMBER 2007

When the TAS3108/TAS3108IA operates as an I2C master, the TAS3108/TAS3108IA generates a

repeated start without an intervening stop command while downloading program and memory data from

EEPROM. When a repeated start is sent to the EEPROM in read mode, the EEPROM enters a sequential

read mode to transfer large blocks of data quickly.

The TAS3108/TAS3108IA queries the bus for an I2C EEPROM at address 1010xxx. The value xxx can be

chip select, other information, or don’t cares, depending on the EEPROM selected.

The first action of the TAS3108/TAS3108IA as master is to transmit a start condition along with the device

address of the I2C EEPROM with the read/write bit cleared (0) to indicate a write. The EEPROM

acknowledges the address byte, and the TAS3108/TAS3108IA sends a subaddress byte, which the

EEPROM acknowledges. Most EEPROMs have at least 2-byte addresses and acknowledge as many as

are appropriate. At this point, the EEPROM sends a last acknowledge and becomes a slave transmitter.

The TAS3108/TAS3108IA acknowledges each byte repeatedly to continue reading each data byte that is

stored in memory.

The memory load information starts with reading the header and data information that starts at

subaddress 0 of the EEPROM. This information must then be stored in sequential memory addresses with

no intervening gaps. The data blocks are contiguous blocks of data that immediately follow the header

locations.

The TAS3108/TAS3108IA memory data can be stored and loaded in (almost) any order. Additionally, this

addressing scheme permits portions of the TAS3108/TAS3108IA internal memories to be loaded.

Figure 6-5. EEPROM Address Map

The TAS3108/TAS3108IA sequentially reads EEPROM memory and loads its internal memory unless it

does not find a valid memory header block, is not able to read the next memory location because the end

of memory was reached, detects a checksum error, or reads an end-of-program header block. When it

encounters an invalid header or read error, the TAS3108/TAS3108IA attempts to read the header or

memory location three times before it determines that it has an error. If the TAS3108/TAS3108IA

encounters a checksum error it attempts to reread the entire block of memory two more times before it

determines that it has an error.

Microprocessor Controller

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