TAS3208IPZP datasheet(26/79 Pages) TI1

26 / 79 page

TAS3208

SLES201E

– JANUARY 2007 – REVISED MARCH 2011

www.ti.com

Power-Up Sequence

The rising edge of the RESET pin begins the initialization of housekeeping functions by clearing memory and

setting the default register values. After housekeeping initialization is complete, the TAS3208 enables the master

I2C interface. The TAS3208 then uses the master I2C interface to determine if an external memory device is

present.

External Memory Device Present

Using the master I2C interface, the TAS3208 will automatically test to see if an external memory device is at

address 1010xxx. The value xxx can be chip selects, other information, or don

’t care depending on the EEPROM

selected.

If an external memory device is present and it contains the correct header information along with one or more

blocks of program/memory data, the TAS3208 will automatically download the M8051 MCU program RAM,

coefficient, and/or data RAM from the external EEPROM. This download is considered complete when an

‘end of

program

’ header is read by the TAS3208.

The memory block structure of the external memory device is available in Master I2C Load RAM Block Formats.

At this point, the TAS3208 will disable the master I2C interface, enable the slave I2C interface, and start normal

operation. After a successful download, the M8051 MCU program counter will be reset and the downloaded

M8051 MCU and DSP application firmware will control execution.

External Memory Device Not Present

If no external EEPROM is present or if an error occurred during the external memory device read, the TAS3208

will disable the master I2C interface, enable the slave I2C interface. The default slave configuration will then be

loaded from the ROM into the M8051 MCU and DSP. In this default configuration, the TAS3208 will stream audio

from input to output if the GPIO1 pin is pulled LOW.

NOTE

The master and slave interfaces do not operate simultaneously, thus when one interface is

enabled, the other is disabled.

I2C Chip Select (CS)

The CS pin on the TAS3208 allows up to two TAS3208 devices to be addressed by the I2C bus via an external

host controller, without the need for external logic. Table 7 and Table 8 list the I2C address for each I2C interface.

Table 7.

I2C Slave Addressing

SLAVE ADDRESS

0x68/69

0x6A/6B

Table 8.

I2C Master Addressing

SLAVE ADDRESS

0xA0/A1

0xA2/A3

General-Purpose Input/Output (GPIO) Pins

The TAS3208 has two level-sensitive GPIO pins, GPIO1 and GPIO2, that are firmware programmable. Upon

power up or following a RESET, GPIO1 becomes an input and has a special function as described in GPIO1 Pin

Function.

Submit Documentation Feedback

Product Folder Link(s): TAS3208

TAS3208IPZP датащи(PDF) 26 Page - Texas Instruments

TAS3208IPZP датащи(HTML) 26 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79

датащи скачать

ссылки URL