(2)

(3)

(4)

(1)

OUTPUT

1:

1:

1:

3.5 k:

3 k:

750:

50:

20:

+

-

-

+

+

-

680 pF

-

+

1:

3.5 k:

3.5 k:

+

-

51:

1.2k:

X1

-

+

51:

RG

1.2k:

CL

10pF

1k:

LMH6723, LMH6724

www.ti.com

SNOSA83I – AUGUST 2003 – REVISED AUGUST 2014

Driving Capacitive Loads (continued)

accuracy, but will still limit maximum output voltage swing.

Figure 36. Series Output Resistor Inside Feedback Loop

7.7 Inverting Input Parasitic Capacitance

Parasitic capacitance is any capacitance in a circuit that was not intentionally added. It is produced through

electrical interaction between conductors and can be reduced but never entirely eliminated. Most parasitic

capacitances that cause problems are related to board layout or lack of termination on transmission lines. See

Layout Considerations for hints on reducing problems due to parasitic capacitances on board traces.

Transmission lines should be terminated in their characteristic impedance at both ends.

High speed amplifiers are sensitive to capacitance between the inverting input and ground or power supplies.

This shows up as gain peaking at high frequency. The capacitor raises device gain at high frequencies by

One possible remedy for this effect is to slightly increase the value of the feedback (and gain set) resistor. This

will tend to offset the high frequency gain peaking while leaving other parameters relatively unchanged. If the

device has a capacitive load as well as inverting input capacitance, using a series output resistor as described in

Driving Capacitive Loads will help.

Figure 37. High Output Current Composite Amplifier

When higher currents are required than a single amplifier can provide, the circuit of Figure 37 can be used.

Careful attention to a few key components will optimize performance from this circuit. The first thing to note is

that the buffers need slightly higher value feedback resistors than if the amplifiers were individually configured.

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