| поискавой системы для электроныых деталей |
|
LM3561TMX/NOPB датащи(PDF) 21 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
LM3561TMX/NOPB датащи(HTML) 21 Page - Texas Instruments |
|
21 / 37 page ![]() SDA Start Condition Stop Condition SCL S P LM3561 www.ti.com SNOSB44C – MARCH 2011 – REVISED MAY 2013 INPUT VOLTAGE MONITOR FAULT The VIN Monitor Flag (bit [7] of the Flags Register) reads back a '1' when the Input Voltage Monitor is enabled and VIN falls below the programmed (VIN_TH). The input voltage must rise above VIN_TH and the Flags register must be read back in order to resume normal operation after the LED current has been forced to Torch mode or turned off due to a VIN Monitor event. TX1 AND TX2 INTERRUPT FLAGS The TX1 and TX2 interrupt flags (bits [3] and [4] of the Flags register) indicate a TX event on the TX1 or TX2 pins. Bit 3 will read back a '1' if TX1/TORCH is in TX1 mode and the pin has changed from low to high since the last read of the Flags Register. Bit [4] will read back a '1' if TX2 is in TX2 mode and the pin has had a TX event since the last read of the Flags Register. A read of the Flags Register automatically resets these bits. A TX event can be either a high to low transition or a low to high transition depending on the setting of the TX1 or TX2 polarity bits (see Table 12). I 2C-Compatible Interface START AND STOP CONDITIONS The LM3561 is controlled via an I2C-compatible interface. START and STOP conditions classify the beginning and end of the I2C session. A START condition is defined as SDA transitioning from HIGH to LOW while SCL is HIGH. A STOP condition is defined as SDA transitioning from LOW to HIGH while SCL is HIGH. The I2C master always generates the START and STOP conditions. Figure 35. Start and Stop Sequences The I2C bus is considered busy after a START condition and free after a STOP condition. During data transmission the I2C master can generate repeated START conditions. A START and a repeated START condition are equivalent function-wise. The data on SDA must be stable during the HIGH period of the clock signal (SCL). In other words, the state of SDA can only be changed when SCL is LOW. Figure 4 and Figure 36 show the SDA and SCL signal timing for the I2C-compatible Bus. See the Electrical Characteristics Table for timing values. Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback 21 Product Folder Links: LM3561 |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |