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LM3550SPX/NOPB датащи(PDF) 28 Page - Texas Instruments |
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LM3550SPX/NOPB датащи(HTML) 28 Page - Texas Instruments |
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28 / 37 page ![]() R1 is then: = 7.959 k : (T R ) x : = k 100 e - + 298 1 273 85 1 E » ¼ º 0.8V x 7.959 k : = 1.8V ± 0.8V 6.367 k : ( ) TRIP - V BIAS V = 1 R ) TRIP ( T R TRIP V e x ( ) C 25 R = T R ° 298 1 273 + C ° T 1 E - ¹ · © § LM3550 SNVS569B – MAY 2009 – REVISED MAY 2013 www.ti.com NOTE The LM3550 is not designed to work with low-voltage, single-cell super-capacitors. Boost Capacitors The LM3550 requires 4 external capacitors for proper operation (C1 = C2 = 1µF; CIN = 4.7 µF; COUT = 2.2 µF). Surface-mount multi-layer ceramic capacitors are recommended. These capacitors are small, inexpensive and have very low equivalent series resistance (ESR <20 m Ω typ.). Tantalum capacitors, OS-CON capacitors, and aluminum electrolytic capacitors are not recommended for use with the LM3550 due to their high ESR, as compared to ceramic capacitors. For most applications, ceramic capacitors with X7R or X5R temperature characteristic are preferred for use with the LM3550. These capacitors have tight capacitance tolerance (as good as ±10%) and hold their value over temperature (X7R: ±15% over −55°C to 125°C; X5R: ±15% over −55°C to 85°C). Capacitors with Y5V or Z5U temperature characteristic are generally not recommended for use with the LM3550. Capacitors with these temperature characteristics typically have wide capacitance tolerance (+80%, −20%) and vary significantly over temperature (Y5V: +22%, −82% over −30°C to +85°C range; Z5U: +22%, −56% over +10°C to +85°C range). Under some conditions, a nominal 1µF Y5V or Z5U capacitor could have a capacitance of only 0.1 µF. Such detrimental deviation is likely to cause Y5V and Z5U capacitors to fail to meet the minimum capacitance requirements of the LM3550. The recommended voltage rating for the capacitors is 10V to account for DC bias capacitance losses. Current Source FET Choosing the proper current source MOSFET is required to ensure accurate flash current delivery. N-Channel MOSFETs (NFET) with allowed drain-to-source voltages (VDS) greater than 5.5V are required. In order to prevent damage to the current source NFET, special attention must be given to the pulsed-current rating of the MOSFET. The NFET must be sized appropriately to handle the desired flash current and flash duration. Most MOSFET manufacturers provide curves showing the NFET's pulsed performance in the electrical characteristics section of their datasheets. A MOSFET's performance rating at temperature, primarily temperatures greater than 40°C, must also be investigated to ensure NFET does not become thermally damaged during a flash pulse. An NFET possessing low RDSON values helps improve the efficiency of the flash pulse. ALD/TEMP Components NTC SELECTION NTC thermistors have a temperature-to-resistance relationship of: (11) where β is given in the thermistor datasheet and R25°C is the thermistor's value at +25°C. R1 in is chosen so that it is equal to: (12) where RT(TRIP) is the thermistors value at the temperature trip point, VBIAS is shown in the Thermistor Resistive Divider Response vs. Temperature graph below, and VTRIP = 800 mV (typ.). Choosing R1 here gives a more linear response around the temperature trip voltage. For example, with VBIAS = 1.8V and a thermistor whose nominal value at +25°C is 100 k Ω and a β = 4500K, the trip point is chosen to be +85°C. The value of R(T) at 85°C is: (13) 28 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM3550 |
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