LM3501 datasheet(4/27 Pages) TI1

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LM3501

SNVS230C – DECEMBER 2003 – REVISED MAY 2013

www.ti.com

Absolute Maximum Ratings

(1) (2)

VIN

−0.3V to 7.5V

VOUT (LM3501-16)

(3)

−0.3V to 16V

VOUT (LM3501-21)

(3)

−0.3V to 21V

VSW

(3)

−0.3V to VOUT+0.3V

FB Voltage

−0.3V to 7.5V

SHDN Voltage

−0.3V to VIN+0.3V

CNTRL

−0.3V to 7.5V

Maximum Junction Temperature

150°C

Lead Temperature

(Soldering 10 sec.)

300°C

Vapor Phase

(60 sec.)

215°C

Infrared

(15 sec.)

220°C

ESD Ratings (4)

Human Body Model

2kV

Machine Model

200V

(1)

Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the

device is intended to be functional, but device parameter specifications may not be specified. For specifications and test conditions, see

the Electrical Characteristics.

(2)

Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and

specifications.

(3)

This condition applies if VIN < VOUT. If VIN > VOUT, a voltage greater than VIN + 0.3V should not be applied to the VOUT or VSW pins.

(4)

The human body model is a 100 pF capacitor discharged through a 1.5 k

Ω resistor into each pin. The machine model is a 200 pF

capacitor discharged directly into each pin.

Operating Conditions

Junction Temperature

(1)

−40°C to +125°C

Supply Voltage

2.7V to 7V

CNTRL Max.

2.7V

(1)

The maximum allowable power dissipation is a function of the maximum operating junction temperature, TJ(MAX), the junction-to-ambient

thermal resistance,

θJA, and the ambient temperature, TA. See the Thermal Properties section for the thermal resistance. The maximum

allowable power dissipation at any ambient temperature is calculated using: PD (MAX) = (TJ(MAX) − TA)/θJA. Exceeding the maximum

allowable power dissipation will cause excessive die temperature.

Thermal Properties

Junction to Ambient Thermal Resistance (

θJA)

(1)

75°C/W

(1)

Junction-to-ambient thermal resistance (

θJA) is highly application and board-layout dependent. The 75ºC/W figure provided was

measured on a 4-layer test board conforming to JEDEC standards. In applications where high maximum power dissipation exists,

special care must be paid to thermal dissipation issues when designing the board layout.

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