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DS1814C датащи(PDF) 5 Page - Dallas Semiconductor |
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DS1814C датащи(HTML) 5 Page - Dallas Semiconductor |
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5 / 8 page ![]() DS1814/DS1819 5 of 8 TIMING DIAGRAM: POWER-UP Figure 8 RST VALID TO 0 VOLTS VCC Figure 9 OUTPUT VALID CONDITIONS The RST output uses a push-pull output which can maintain a valid output down to 1.0V VCC. To sink current below 1.0V a resistor can be connected form RST to Ground (see Figure 9.) This arrangement will maintain a valid value on RST during both power-up and -down but will draw current when RST is in the high state. A value of about 100k W should be adequate in most situations. The output with a resistor pull-down can maintain a valid reset down to VCC equal to 0V. |
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