FA3647 datasheet(9/21 Pages) FUJI

9 / 21 page

FA3641P(N), FA3647P(N)

Fig. 7 CS pin waveform

Fig. 6 CS pin circuit

4. CS pin circuit

As shown in Figure 6, capacitor Cs is connected to the CS pin.

The CS pin voltage varies depending on the charging voltage of

this capacitor Cs. When the power is turned on, the constant

current source (6.5

µA) begins to charge capacitor. Accordingly,

the CS pin voltage rises as shown in Figure 7. The CS pin

voltage is connected to the PWM comparator, which is

characterized to make output based on the lowest of input

voltages. The device enters soft-start mode while the CS pin

voltage is between 1.0V and 2.4V. During normal operation, the

CS pin is clamped at 4.0V by internal zener diode.

If the output voltage drops due to an overload and the FB

voltage rises to 3V or more, the clamp voltage 4.0V is canceled

and the CS pin voltage rises to 9.5V. The CS pin is also

connected to latch comparator C2. If the CS pin voltage rises

to 8.5V or more, comparator C2 toggles to turn off the 5V REF

circuit, thereby shutting the output down. Since the CS pin is

also connected to comparator C1, the 5V REF circuit can be

turned off to shut the output down by dropping the CS pin

voltage below 0.68V. In this way, comparator C1 can be used

for output on-off control.

As explained above, the CS pin can be used for soft-start,

overload output shutdown, and output on-off control by varying

the voltage.

Further details on the above three major functions of the CS pin

are given below.

4.1 Soft start function

Figure 8 shows the soft start circuit. Figure 9 is a soft-start

operation timing chart. The CS pin is connected to capacitor

Cs. When the power is turned on, the constant current source

(6.5

µA) begins to charge the capacitor. As shown in the timing

chart, the CS pin voltage rises slowly in accordance with the

capacitor Cs charging current. The CS pin is also connected to

the IC internal PWM comparator, which has such

characteristics that the voltage is determined to output on the

basis of the lowest of input voltages. The comparator output

pulse slowly widens to cause a soft start as shown in the timing

chart.

The soft start period can be approximately estimated by the

period tS, from the time the IC is activated to the time the output

pulse width widens to 30%. The period is given by the following

equation:

ts [ms]

250

Cs ...................................................... (3)

Cs : Soft start capacitor [

µF]

Fig. 8 Soft-sart circuit

Fig. 9 Soft-sart timing chart

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