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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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DP83902AVF датащи(PDF) 58 Page - National Semiconductor (TI) |
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DP83902AVF датащи(HTML) 58 Page - National Semiconductor (TI) |
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58 / 70 page  150 Switching Characteristics AC Specs DP83902A Note All Timing is Preliminary (Continued) DMA Memory Read TLF11157 – 39 Symbol Parameter Min Max Units bcrl Bus Clock to Read Strobe Low 43 ns bcrh Bus Clock to Read Strobe High 40 ns ds Data Setup to Read Strobe High 22 ns dh Data Hold from Read Strobe High 0 ns drw DMA Read Strobe Width Out 2 bcyc b 15 ns raz Memory Read High to Address TRI-STATE bch a 40 ns (Notes 1 2) asds Address Strobe to Data Strobe bcl a 10 ns dsada Data Strobe to Address Active bcyc b 10 ns avrh Address Valid to Read Strobe High 3 bcyc b 18 ns Note 1 During a burst A8–A15 are not TRI-STATE if byte wide transfers are selected On the last transfer A8–A15 are TRI-STATE as shown above Note 2 These limits include the RC delay inherent in our test method These signals typically turn off within bch a 15 ns enabling other devices to drive these lines with no contention 58 |
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