AD9864-EB datasheet(27/44 Pages) AD

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AD9864

()

[

]

fCLK

TO DIGITAL

FILTER

RESO-

NATOR

NINE-

LEVEL

FLASH

ESL

GAIN

CONTROL

MIXER

OUTPUT

EXTERNAL

fCLK = 13 MSPS TO 26 MSPS

MXOP

MXON

IF2P

IF2N

RESO-

NATOR

DAC1

For example, at fCLK = 18 MHz and L = 10 µH, a capacitance of

250 pF is needed. However, in order to accommodate an induc-

tor tolerance of ±10%, the tank capacitance must be adjustable

from 227 pF to 278 pF. Selecting an external capacitor of 180 pF

ensures that even with a 10% tolerance and stray capacitances

as high as 30 pF, the total capacitance will be less than the

minimum value needed by the tank. Extra capacitance is sup-

plied by the AD9864’s on-chip programmable capacitor array.

Since the programming range of the capacitor array is at least

160 pF, the AD9864 has plenty of range to make up for the tol-

erances of low cost external components. Note that if fCLK is

increased by a factor of 1.44 MHz to 26 MHz so that fCLK/8

becomes 3.25 MHz, reducing L and C by approximately the

same factor (i.e., L = 6.9 µH and C = 120 pF) still satisfies the

requirements stated above.

Figure 46. Equivalent Circuit of Sixth Order Band-Pass Σ-∆ Modulator

Figure 47 shows the measured power spectral density measured at

the output of the undecimated band-pass Σ-∆ modulator. Note

that the wide dynamic range achieved at the center frequency,

fCLK/8, is achieved once the LC and RC resonators of the Σ-∆

modulator have been successfully tuned. The out-of-band noise is

removed by the decimation filters following quadrature mixer.

A 16 dB step attenuator is also included within the LNA/mixer

circuitry to prevent large signals (i.e., > –18 dBm) from over-

driving the Σ-∆ modulator. In such instances, the Σ-∆ modula-

tor will become unstable, thus severely desensitizing the

receiver. The 16 dB step attenuator can be invoked by setting

the ATTEN bit (Register 0x03, Bit 7), causing the mixer gain to

be reduced by 16 dB. The 16 dB step attenuator could be used

in applications in which a potential target or blocker signal

could exceed the IF input clip point. Although the LNA will be

driven into compression, it may still be possible to recover the

desired signal if it is FM. Refer to Table 14 to see the gain com-

pression characteristics of the LNA and mixer with the 16 dB

attenuator enabled.

–10

–20

–30

–50

–40

FREQUENCY (MHz)

–60

–70

–80

–90

–100

–2dBFS OUTPUT

fCLK = 18MHz

NBW = 3.3kHz

Table 14. SPI Registers Associated with LNA/Mixer

Address

(Hex)

Bit

Breakdown

Width

Default

Value

Name

0x00

(7:0)

0xFF

STBY

0x03

(7)

ATTEN

Figure 47. Measured Undecimated Spectral Output of Σ-∆

Modulator ADC with fCLK = 18 MSPS and Noise Bandwidth of 3.3 kHz

The signal transfer function of the AD9864 possesses inherent

anti-alias filtering by virtue of the continuous-time portions of

the loop filter in the band-pass Σ-∆ modulator. Figure 48 illus-

trates this property by plotting the nominal signal transfer

function of the ADC for frequencies up to 2fCLK. The notches

that naturally occur for all frequencies that alias to the fCLK/8

pass band are clearly visible. Even at the widest bandwidth set-

ting, the notches are deep enough to provide greater than 80 dB

of alias protection. Thus, the wideband IF filtering require-

ments preceding the AD9864 will be determined mostly by the

mixer’s image band, which is offset from the desired IF input

frequency by fCLK/4 (i.e., 2 × fCLK/8) rather than any aliasing

associated with the ADC.

BAND-PASS ∑-∆ ADC

The ADC of the AD9864 is shown in Figure 46. The ADC con-

tains a sixth order multibit band-pass Σ-∆ modulator that

achieves very high instantaneous dynamic range over a narrow

frequency band. The loop filter of the band-pass Σ-∆ modulator

consists of two continuous-time resonators followed by a discrete

time resonator, with each resonator stage contributing a pair of

complex poles. The first resonator is an external LC tank, while

the second is an on-chip active RC filter. The output of the LC

resonator is ac-coupled to the second resonator input via 100 pF

capacitors. The center frequencies of these two continuous-time

resonators must be tuned to fCLK/8 for the ADC to function prop-

erly. The center frequency of the discrete-time resonator auto-

matically scales with fCLK, thus no tuning is required.

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