AD5346/AD5347/AD5348

Rev. 0 | Page 8 of 24

AD5347 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

TOP VIEW

(Not to Scale)

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

AD5347

LDAC

A1

A0

WR

CS

AGND

PD

CLR

GAIN

10-BIT

DGND

A2

RD

BUF

DGND

DGND

Figure 7. AD5347 Pin Configuration—TSSOP

11

12

13

14

15

16

17

18

19

20

1

2

3

4

5

6

7

8

9

10

30

29

28

27

26

25

24

23

22

21

40

39

38

37

36

35

34

33

32

31

CS

AGND

RD

AGND

TOP VIEW

(Not to Scale)

AD5347

10-BIT

Figure 8. AD5347 Pin Configuration—LFCSP

Table 6. AD5347 Pin Function Descriptions

Pin Number

TSSOP

LFCSP

Mnemonic

Function

1

35

Reference Input for DACs G and H.

2

36

Reference Input for DACs E and F.

3

37

Reference Input for DACs C and D.

4

38, 39

Power Supply Pin(s). This part can operate from 2.5 V to 5.5 V, and the supply should be decoupled

must be at the same potential.

5

40

Reference Input for DACs A and B.

6–9,

11–14

1–4,

7–10

Output of DAC X. Buffered output with rail-to-rail operation.

10

5, 6

AGND

Analog Ground. Ground reference for analog circuitry.

15, 21–22

11,

17–18

DGND

Digital Ground. Ground reference for digital circuitry.

16

12

BUF

Buffer Control Pin. Controls whether the reference input to the DAC is buffered or unbuffered.

17

13

LDAC

Active Low Control Input. Updates the DAC registers with the contents of the input registers, which

allows all DAC outputs to be simultaneously updated.

18

14

A0

LSB Address Pin. Selects which DAC is to be written to.

19

15

A1

Address Pin. Selects which DAC is to be written to.

20

16

A2

MSB Address Pin. Selects which DAC is to be written to.

23–32

19–28

33

29

CS

Active Low Chip Select Input. Used in conjunction with WR to write data to the parallel interface, or

with RD to read back data from a DAC.

34

30

RD

Active Low Read Input. Used in conjunction with CS to read data back from the internal DACs.

35

31

WR

Active Low Write Input. Used in conjunction with CS to write data to the parallel interface.

36

32

GAIN

37

33

CLR

Asynchronous Active Low Control Input. Clears all input registers and DAC registers to zeros.

38

34

PD

Power-Down Pin. This active low control pin puts all DACs into power-down mode.