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AD628ARM датащи(PDF) 15 Page - Analog Devices

номер детали AD628ARM
подробное описание детали  High Common-Mode Voltage Programmable Gain Difference Amplifier
PDF  20 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD628ARM датащи(HTML) 15 Page - Analog Devices

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AD628
Rev. C | Page 15 of 20
APPLICATIONS
GAIN ADJUSTMENT
The AD628 system gain is provided by an architecture
consisting of two amplifiers. The gain of the input stage
is fixed at 0.1; the output buffer is user adjustable as
GA2 = 1 + REXT1/REXT2. The system gain is then
⎟⎟
⎜⎜
+
×
=
EXT2
EXT1
TOTAL
R
R
G
1
1
.
0
(1)
At a 2 nA maximum, the input bias current of the buffer amplifier
is very low and any offset voltage induced at the buffer amplifier by
its bias current may be neglected (2 nA × 10 kΩ = 20 µV). However,
to absolutely minimize bias current effects, REXT1 and REXT2 may be
selected so that their parallel combination is 10 kΩ. If practical
resistor values force the parallel combination of REXT1 and REXT2
below 10 kΩ, a series resistor (REXT3) may be added to make up for
the difference. Table 5 lists several values of gain and corresponding
resistor values.
Table 5. Nearest Standard 1% Resistor Values for Various
Gains (See Figure 29)
Total Gain
(V/V)
A2 Gain
(V/V)
REXT1 (Ω)
REXT2 (Ω)
REXT3 (Ω)
0.1
1
10 k
0
0.2
2
20 k
20 k
0
0.25
2.5
25.9 k
18.7 k
0
0.5
5
49.9 k
12.4 k
0
1
10
100 k
11 k
0
2
20
200 k
10.5 k
0
5
50
499 k
10.2 k
0
10
100
1 M
10.2 k
0
To set the system gain to less than 0.1, an attenuator may be
created by placing a resistor, REXT4, from Pin 4 (CFILT) to the
reference voltage. A divider would be formed by the 10 kΩ
resistor which is in series with the positive input of A2 and
REXT4. A2 would be configured for unity gain.
Using a divider and setting A2 to unity gain yields
1
10
0.1
/
×
⎟⎟
⎜⎜
+
×
=
EXT4
EXT4
DIVIDER
W
R
R
G
INPUT VOLTAGE RANGE
The common-mode input voltage range is determined by VREF
and the supply voltage. The relation is expressed by
REF
S
CM
REF
S
CM
V
V
V
V
V
UPPER
10
)
V
2
.
1
(
11
V
10
)
V
2
.
1
(
11
LOWER
+
+
(2)
where
+
S
V
is the positive supply,
S
V
is the negative supply
and 1.2 V is the headroom needed for suitable performance.
Equation 2 provides a general formula for calculating the
common-mode input voltage range. However, the AD628
should be kept within the maximum limits listed in the
Specifications table (Table 1) to maintain optimal performance.
This is illustrated in Figure 30 where the maximum common-
mode input voltage is limited to ±120 V. Figure 31 shows the
common-mode input voltage bounds for single-supply voltages.
–200
–150
–100
–50
0
50
100
150
200
8
6
24
010
12
14
16
SUPPLY VOLTAGE (±V)
MAXIMUM INPUT COMMON-MODE
VOLTAGE WHEN VREF = GND
Figure 30. Input Common-Mode Voltage vs. Supply Voltage for Dual Supplies
–80
–60
–40
–20
0
20
40
60
80
100
8
6
24
010
12
14
16
SINGLE-SUPPLY VOLTAGE (V)
MAXIMUM INPUT COMMON-MODE
VOLTAGE WHEN VREF = MIDSUPPLY
Figure 31. Input Common-Mode Voltage vs.
Supply Voltage for Single Supplies



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