DP83858VF datasheet(13/37 Pages) NSC

13 / 37 page

http:\\www.national.com

3.9 Management Bus

The task of network statistics gathering in a repeater sys-

tem is divided between the DP83858 and DP83856

devices. Together, these devices collect all the required

management information (compliant to IEEE 802.3u clause

30) associated with a packet.

Each time a packet is received by a DP83858, it drives the

device and the port number onto the management bus in 3

contiguous nibbles of data.

During a single reception, only one DP83858 drives this

information onto the management bus. During a collision,

the management bus will TRI-STATE (because the informa-

tion on this bus becomes invalid).

The ﬁrst nibble of management data contains the least sig-

niﬁcant 4 bits of the RID number, the second contains the

most signiﬁcant bit of the RID number and the third con-

tains the number of the receiving port.

When the 100RIC8 is not receiving a packet, it monitors the

RID numbers from other 100RIC8s. If there is a match

between any of these numbers and 100RIC8’s own RID,

then a RID contention error signal (RID_ER) is asserted.

The management bus also indicates whether an elasticity

buffer error (due to under-run or over-run) has occurred by

asserting the /M_ER signal.

3.10 Management Event Flags and Counters

Repeater management statistics are supported either

directly by using the DP83858's on-chip event ﬂags and

counters, or indirectly, by the DP83858 providing the infor-

mation to the DP83856 via the management and transmit

bus.

Management information is maintained within the DP83858

in two ways: event ﬂags and counters.

3.10.1 Event Flags

These are the events that provide a snapshot of the opera-

tion of the DP83858. These events include:

s Auto-Partition State, indicating whether a port is current-

ly partitioned.

s Jabber State, indicating whether a port is in jabber state.

s Administration State, indicating if a port is disabled.

3.10.2 Event Counters

The event counters maintain the statistics for events that

occur too frequently for polled ﬂags, or are collision ori-

ented. Each port has its own set of event counters that

keep track of the following events:

s Port Collisions. A 32-bit counter providing the number of

collision occurrences on a port.

s Port Partitions. A 16-bit counter indicating the number of

times that the port has partitioned.

s Late Events. A 32-bit counter indicating the number of

times that a collision took place after 512 bit times (nom-

inal). In the case of late events, both the late event and

the collision counters will be incremented.

s Short Events. A 32-bits wide counter indicating the num-

ber of packets whose length is 76 bits (nominal) or less.

3.11 Serial Register Interface

The DP83858 has 64 registers held in two pages of 32

(Register Page 0 and Register Page 1). The registers are

16 bits wide. Only one page of registers can be accessed

at a time.

After power-up and/or reset, the DP83858 defaults to Reg-

ister Page 0. Register Page 1 can be accessed by writing

0001h to the PAGE register in Register Page 0, whereupon

further accesses will be to Register Page 1. Subsequently

writing 0000h to the PAGE register in Register Page 1

switches the registers back to Register Page 0.

All accesses to DP83858 registers and counters, and to the

connected Physical Layer devices (via the DP83858), are

performed serially using the RDIO and RDC pins. The RDC

clock is limited to a frequency no greater than 2.5MHz. This

interface implements the serial management protocol

deﬁned by the MII speciﬁcation, IEEE 802.3u clause 22.

The protocol uses bit streams with the following format:

For Read operation: <start><opcode><device addr><reg

addr> [turnaround] 0<data>.

For Write operation: <start><opcode><device addr><reg

addr> <10><data>.

This protocol allows for up to 32 devices (DP83858s or

other MII compliant devices) to be connected, each with a

unique address and up to 32 16-bit registers. Devices are

cascaded on the RDIO and RDC signals.

Since the RDIO pin is shared for both read and write oper-

ations, it must only be driven at the proper time. The serial

protocol assumes that there is only one master (generally,

the management entity's processor) and one or more slave

devices (generally, the Physical Layer or DP83858 chips).

The master drives RDIO at all times except when, during a

slave read operation, the addressed slave places the seri-

alized read data onto the RDIO line after the line turn-

around ﬁeld's ﬁrst bit.

Unmanaged systems that do not use the DP83856 100RIB

device for repeater management, it is important to provide

the 100RIC with a minimum of 3 cycles of RDC during

device reset. If the minimum number of cycles of RDC is

not provided, the Serial Register Access Logic block may

not be properly reset and as a result RDIO may not func-

tion properly. The 100RIB provides continuous RDC cycles,

and eliminates this concern.

The ﬁelds of the protocol are deﬁned in Table 3-1. In order

for the protocol to work, all serial logic must ﬁrst be “syn-

chronized” to incoming data. A preamble of 32 consecutive

1's transmitted before the <start> ﬁeld ensures "data lock".

DP83858VF датащи(PDF) 13 Page - National Semiconductor (TI)

DP83858VF датащи(HTML) 13 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37

датащи скачать

ссылки URL