CDC337

CLOCK DRIVER

WITH 3-STATE OUTPUTS

SCAS330B – DECEMBER 1990 – REVISED OCTOBER 1998

5

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

th

tsu

From Output

Under Test

CL = 50 pF

(see Note A)

LOAD CIRCUIT

S1

2

× VCC

Open

GND

500

Ω

500

Ω

TEST

tPLH/tPHL

tPLZ/tPZL

tPHZ/tPZH

S1

Open

2

× VCC

Open

Output

Control

(low-level

enabling)

Output

Waveform 1

S1 at 2

× VCC

(see Note C)

Output

Waveform 2

S1 at Open

(see Note C)

VOL

VOH

tPZL

tPZH

tPLZ

tPHZ

1.5 V

1.5 V

0 V

50% VCC

VOL + 0.3 V

VOH – 0.3 V

≈ 0 V

3 V

Data Input

Timing Input

1.5 V

3 V

0 V

1.5 V

1.5 V

3 V

0 V

3 V

0 V

1.5 V

1.5 V

tw

Input

VOLTAGE WAVEFORMS

VOLTAGE WAVEFORMS

VOLTAGE WAVEFORMS

VOLTAGE WAVEFORMS

tPLH

tPHL

Output

1.5 V

1.5 V

3 V

0 V

50% VCC

VOH

VOL

Input

0.8 V

2 V

tr

tf

0.8 V

2 V

≈ VCC

50% VCC

NOTES: A. CL includes probe and jig capacitance.

B. All input pulses are supplied by generators having the following characteristics: PRR

≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.

C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.

D. The outputs are measured one at a time with one transition per measurement.

Figure 1. Load Circuit and Voltage Waveforms