2004 Sep 23

7

Philips Semiconductors

Product specification

Dual 2-input NAND gate

74LVC2G00

DC CHARACTERISTICS

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

SYMBOL

PARAMETER

TEST CONDITIONS

MIN.

TYP.(1)

MAX.

UNIT

OTHER

HIGH-level input voltage

1.65 to 1.95

0.65

V

2.3 to 2.7

1.7

−−

V

2.7 to 3.6

2.0

−−

V

4.5 to 5.5

0.7

× V

CC

−−

V

LOW-level input voltage

1.65 to 1.95

−−

0.35

2.3 to 2.7

−−

0.7

V

2.7 to 3.6

−−

0.8

V

4.5 to 5.5

−−

0.3

V

1.65 to 5.5

−−

0.1

V

1.65

−

0.08

0.45

V

2.3

−

0.14

0.3

V

2.7

−

0.19

0.4

V

3.0

−

0.37

0.55

V

4.5

−

0.43

0.55

V

HIGH-level output

voltage

1.65 to 5.5

−−

V

1.65

1.2

1.53

−

V

2.3

1.9

2.13

−

V

2.7

2.2

2.50

−

V

3.0

2.3

2.60

−

V

4.5

3.8

4.10

−

V

input leakage current

5.5

−±0.1

±5

µA

power OFF leakage

current

0

−±0.1

±10

µA

quiescent supply current

5.5

−

0.1

10

µA

additional quiescent

supply current per pin

2.3 to 5.5

−

5

500

µA