Not to scale

1

VDD

6

CS

2

GND

5

SDATA

3

VIN

4

SCLK

3

ADCS7476, ADCS7477, ADCS7478

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SNAS192G – APRIL 2003 – REVISED MAY 2016

Product Folder Links: ADCS7476 ADCS7477 ADCS7478

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5 Pin Configuration and Functions

DBV Package

6-Pin SOT-23

Top View

(1)

G = Ground, I = Input, O = Output, P = Power

Pin Functions

PIN

DESCRIPTION

NO.

NAME

1

P

Positive supply pin. These pins must be connected to a quiet 2.7-V to 5.25-V source and bypassed

to GND with 0.1-µF and 1-µF monolithic capacitors placed within 1 cm of the power pin. ADCS747x

uses this power supply as a reference, so it must be thoroughly bypassed.

2

GND

G

The ground return for the supply.

3

I

4

SCLK

I

Digital clock input. The range of frequencies for this input is 10 kHz to 20 MHz, with ensured

performance at 20 MHz. This clock directly controls the conversion and readout processes.

5

SDATA

O

Digital data output. The output words are clocked out of this pin by the SCLK pin.

6

CS

I

Chip select. A conversion process begins on the falling edge of CS.