CD54HC280 datasheet(4/9 Pages) TI

номер детали	CD54HC280

подробное описание детали	High-Speed CMOS Logic 9-Bit Odd/Even Parity Generator/Checker

PDF	9 Pages

Scroll/Zoom	100%

производитель	TI [Texas Instruments]

домашняя страница	http://www.ti.com

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4 / 9 page

Output Transition Time

tTLH, tTHL

CL = 50pF

110

4.5

Input Capacitance

Power Dissipation

Capacitance

(Notes 3, 4)

CPD

HCT TYPES

Propagation Delay,

Any Input to

ΣO

tPLH, tPHL

CL = 50pF

4.5

CL = 15pF

Propagation Delay,

Any Input to

ΣE

tPLH, tPHL

CL = 50pF

4.5

CL = 15pF

Output Transition Time

tTLH, tTHL

CL = 50pF

4.5

Input Capacitance

CIN

Power Dissipation

Capacitance

(Notes 3, 4)

CPD

NOTES:

3. CPD is used to determine the dynamic power consumption, per package.

4. PD = VCC

2 f

i (CPD + CL) where fi = Input Frequency, fO = Output Frequency, CL = Output Load Capacitance, VCC = Supply Voltage.

Switching Speciﬁcations Input tr, tf = 6ns (Continued)

PARAMETER

SYMBOL

TEST

CONDITIONS

VCC (V)

25oC

-40oC TO 85oC

-55oC TO

125oC

UNITS

TYP

MAX

Test Circuits and Waveforms

FIGURE 1. HC TRANSITION TIMES AND PROPAGATION

DELAY TIMES, COMBINATION LOGIC

FIGURE 2. HCT TRANSITION TIMES AND PROPAGATION

DELAY TIMES, COMBINATION LOGIC

tPHL

tPLH

tTHL

tTLH

90%

50%

10%

50%

10%

INVERTING

OUTPUT

INPUT

GND

VCC

tr = 6ns

tf = 6ns

90%

tPHL

tPLH

tTHL

tTLH

2.7V

1.3V

0.3V

1.3V

10%

INVERTING

OUTPUT

INPUT

GND

tr = 6ns

tf = 6ns

90%

CD54HC280, CD74HC280, CD54HCT280, CD74HCT280

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