TDA8029C2 datasheet(13/58 Pages) PHILIPS

13 / 58 page

2003 Oct 30

Philips Semiconductors

Product speciﬁcation

Low power single card reader

TDA8029

8.2

Timer 2 operation

Timer 2 is a 16-bit timer and counter which can operate as either an event timer or an event counter, as selected by bit

C/T2 in the special function register T2CON. Timer 2 has three operating modes: capture, auto-reload (up-or down

counting), and baud rate generator, which are selected by bits in register T2CON.

8.2.1

TIMER/COUNTER 2CONTROL REGISTER (T2CON)

Table 4

Timer/counter 2 control register bits

Table 5

Description of register bits

Table 6

Timer 2 operating modes

BIT

543210

Symbol

TF2

EXF2

RCLK

TCLK

EXEN2

TR2

C/T2

CP/RL2

BIT

SYMBOL

DESCRIPTION

TF2

Timer 2 overﬂow ﬂag. Set by a timer 2 overﬂow and must be cleared by software. TF2

will not be set when either RCLK = 1 or TCLK = 1.

EXF2

Timer 2 external ﬂag. Set when either a capture or reload is caused by a negative

transition on controller input T2EX and EXEN2 = 1. When timer 2 interrupt is enabled,

EXF2 = 1 will cause the CPU to vector to the timer 2 interrupt routine. EXF2 must be

cleared by software. EXF2 does not cause an interrupt in up- or down-counter mode

(DCEN = 1).

RCLK

Receive clock ﬂag. When set, causes the serial port to use timer 2 overﬂow pulses for

its receive clock in modes 1 and 3. When reset, causes timer 1 overﬂow to be used for

the receive clock.

TCLK

Transmit clock ﬂag. When set, causes the serial port to use timer 2 overﬂow pulses for

its transmit clock in modes 1 and 3. When reset, causes timer 1 overﬂows to be used for

the transmit clock.

EXEN2

Timer 2 external enable ﬂag. When set, allows a capture or reload to occur as a result

of a negative transition on T2EX if timer 2 is not being used to clock the serial port. When

reset, causes timer 2 to ignore events at T2EX.

TR2

Start/stop control for timer 2. TR2 = 1 starts the timer.

1C/T2

Counter or Timer select timer 2. If C/T2 = 0 the internal timer at 1/12fXTAL1 is selected;

C/T2 = 1 selects the external event counter (falling edge triggered).

CP/RL2

Capture or reload ﬂag. When set, captures will occur on negative transitions at T2EX if

EXEN2 = 1. When reset, auto-reloads will occur either with timer 2 overﬂows or negative

transitions at T2EX when EXEN2 = 1. When either RCLK = 1 or TCLK = 1, this bit is

ignored and the timer is forced to auto-reload on timer 2 overﬂow.

MODE

RCLK AND TCLK

CP/RL2

TR2

16-bit auto-reload

Baud rate generator

Off

TDA8029C2 датащи(PDF) 13 Page - NXP Semiconductors

TDA8029C2 датащи(HTML) 13 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58

датащи скачать

ссылки URL