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CS5530 датащи(PDF) 221 Page - National Semiconductor (TI) |
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CS5530 датащи(HTML) 221 Page - National Semiconductor (TI) |
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221 / 241 page ![]() Revision 4.1 221 www.national.com Register Descriptions (Continued) Table 4-33. SETUP_IDX Values Index Operation 0x00 No operation 0x10 Configure GPIO0 to PM1A_STS or GPE0_STS bits 0x11 Configure GPIO1 to PM1A_STS or GPE0_STS bits 0x12 Configure GPIO2 to PM1A_STS or GPE0_STS bits 0x13 Configure GPIO3 to PM1A_STS or GPE0_STS bits 0x14 Configure GPIO4 to PM1A_STS or GPE0_STS bits 0x15 Configure GPIO5 to PM1A_STS or GPE0_STS bits 0x16 Configure GPIO6 to PM1A_STS or GPE0_STS bits 0x17 Configure GPIO7 to PM1A_STS or GPE0_STS bits 0x30 Configure IRQ0 to wakeup system 0x31 Configure IRQ1 to wakeup system 0x32 Do not use – Reserved for cascade interrupt 0x33 Configure IRQ3 to wakeup system 0x34 Configure IRQ4 to wakeup system 0x35 Configure IRQ5 to wakeup system 0x36 Configure IRQ6 to wakeup system 0x37 Configure IRQ7 to wakeup system 0x38 Configure IRQ8 to wakeup system (Defaults to RTC_STS in PM1A_STS) 0x39 Configure IRQ9 to wakeup system. 0x3A Configure IRQ10 to wakeup system. 0x3B Configure IRQ11 to wakeup system 0x3C Configure IRQ12 to wakeup system 0x3D Do not use – Reserved for math coprocessor 0x3E Configure IRQ14 to wakeup system 0x3F Configure IRQ15 to wakeup system 0x40 Generate GBL_STS – Sets the GLB_STS bit and generates a SCI to the OS 0x41 Configure IRQ to be used for SCI 0x42 Enable reads of ACPI registers 0x43 Do atomic I/O sequence 0x50 Video power 0x60 Soft SMI AX = 6000 emulation 0x61 Soft SMI AX = 6001 emulation 0x62 Soft SMI AX = 6002 emulation 0x63 Soft SMI AX = 6003 emulation 0x64 Audio power control Table 4-34. GPIO Mapping (0x10-0x17) SETUP_ DATA Function xx Value 0x00 No mapping – Do not use this GPIO pin 0x08 Assign GPIOx to PWRBTN_STS bit in PM1A_STS 0x09 Assign GPIOx to SLPBTN_STS in PM1A_STS 0x10 Assign GPIOx to bit 0 in GPE0_STS register 0x11 Assign GPIOx to bit 1 in GPE0_STS register 0x12 Assign GPIOx to bit 2 in GPE0_STS register 0x13 Assign GPIOx to bit 3 in GPE0_STS register 0x14 Assign GPIOx to bit 4 in GPE0_STS register 0x15 Assign GPIOx to bit 5 in GPE0_STS register 0x16 Assign GPIOx to bit 6 in GPE0_STS register 0x17 Assign GPIOx to bit 7 in GPE0_STS register 0x18 Assign GPIOx to bit 8 in GPE0_STS register 0x19 Assign GPIOx to bit 9 in GPE0_STS register 0x1A Assign GPIOx to bit 10 in GPE0_STS register 0x1B Assign GPIOx to bit 11 in GPE0_STS register 0x1C Assign GPIOx to bit 12 in GPE0_STS register 0x1D Assign GPIOx to bit 13 in GPE0_STS register 0x1E Assign GPIOx to bit 14 in GPE0_STS register 0x1F Assign GPIOx to bit 15 in GPE0_STS register y Value (y values may be ORed together to get the desired combination of features) 0x01 Falling edge 0x02 Rising edge 0x04 Power button 0x08 Reserved Note: For GPIO mapping, a value of 0000zyxx is used where: z = a runtime/wake indicator y = the edge to be used xx = a bit in either PM1A_STS or GPE0_STS When using V-ACPI both edges of GPIO6 can be sensed. When using the CS5530, GPIO6 provides additional hardware that enables the chipset to gener- ate an SMI on both the rising and falling edges of the input signal. |
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