COP688EB datasheet(6/75 Pages) NSC

номер детали	COP688EB

подробное описание детали	8-Bit CMOS ROM Based Microcontrollers with 8k Memory, CAN Interface, 8-Bit A/D, and USART

PDF	75 Pages

Scroll/Zoom	100%

производитель	NSC [National Semiconductor (TI)]

домашняя страница	http://www.national.com

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6 / 75 page

DC Electrical Characteristics COP88xEB (Continued)

Note 3: Supply current is measured after running 2000 cycles with a square wave CKI input, CKO open, inputs at VCC or GND, and outputs open.

Note 4: The HALT mode will stop CKI from oscillating in the Crystal configurations. Halt test conditions: All inputs tied to VCC; Port C, G, E, F, L, M and N I/Os con-

figured as outputs and programmed low; D outputs programmed high. Parameter refers to HALT mode entered via setting bit 7 of the Port G data register. Part will

pull up CKI during HALT in crystal clock mode. Both CAN main comparator and the CAN Wakeup comparator need to be disabled.

Note 5: HALT and IDLE current specifications assume CAN block comparators are disabled.

Note 6: Pins G6 and RESET are designed with a high voltage input network. These pins allow input voltages greater than VCC and the pins will have sink current

to VCC when biased at voltages greater than VCC (the pins do not have source current when biased at a voltage below VCC). The effective resistance to VCC is 750Ω

(typical). These two pins will not latch up. The voltage at the pins must be limited to less than 14V.

Note 7: Condition and parameter valid only for part in HALT mode.

Note 8: Parameter characterized but not tested.

COP688EB датащи(PDF) 6 Page - National Semiconductor (TI)

COP688EB датащи(HTML) 6 Page - National Semiconductor (TI)

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