ADuM4151/ADuM4152/ADuM4153

Data Sheet

MCLK

3

MO

4

20

19

18

17

MI

5

MSS

6

16

15

14

13

12

SCLK

SI

SO

SSS

10

11

ADuM4153

TOP VIEW

(Not to Scale)

Figure 7. ADuM4153 Pin Configuration

Table 22. ADuM4153 Pin Function Descriptions

Pin No.

Mnemonic Direction Description

1

Power

2, 10

Return

Ground 1. Ground reference for Isolator Side 1.

3

MCLK

Clock

SPI Clock from the Master Controller.

4

MO

Input

SPI Data from the Master to the Slave MO/SI Line

5

MI

Output

SPI Data from the Slave to the Master MI/SO Line.

6

MSS

Input

Slave Select from the Master. This signal uses an active low logic. The slave select pin requires a 10 ns

setup time from the next clock or data edge.

7

Output

Low Speed Data Output A.

8

Output

Low Speed Data Output B.

9

Output

Low Speed Data Output C.

11, 19

Return

Ground 1. Ground reference for Isolator Side 2.

12

Input

Low Speed Data Input C.

13

Input

Low Speed Data Input B.

14

Input

Low Speed Data Input A.

15

SSS

Output

Slave Select to the Slave. This signal uses an active low logic.

16

SO

Input

SPI Data from the Slave to the Master MI/SO Line.

17

SI

Output

SPI Data from the Master to the Slave MO/SI Line.

18

SCLK

Output

SPI Clock from the Master Controller.

20

Power

Side 1 Outputs

Side 2 Outputs

SSS

Comments

Unpowered

Powered

Z

Z

Z

Outputs on an unpowered side are high impedance within

one diode drop of ground

Powered

Unpowered

Z

Z

Z

Outputs on an unpowered side are high impedance within one

diode drop of ground

1

Z is high impedance.

Rev. A | Page 16 of 22