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HMC7992 датащи(PDF) 11 Page - Analog Devices |
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HMC7992 датащи(HTML) 11 Page - Analog Devices |
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11 / 13 page ![]() Data Sheet HMC7992 Rev. 0 | Page 11 of 13 THEORY OF OPERATION The HMC7992 requires a single positive supply voltage applied to the VDD pin. A bypassing capacitor is recommended on the supply line to minimize RF coupling. The HMC7992 integrates with an internal 2:4 decoder; the four RF paths are selected via the two digital control voltages applied to the A and B control inputs. A small value bypassing capacitor is recommended on these digital signal lines to improve the RF signal isolation. The HMC7992 is internally matched to 50 Ω at the RF common port (RFC) and the RF ports (RF1, RF2, RF3, and RF4); therefore, no external matching components are required. The RF pins are dc-coupled and dc blocking capacitors are required on the RF paths. The design is bidirectional; the RF input signals can apply at the RFC port or the RF1 to RF4 ports. The inputs and outputs are interchangeable. Depending on the logic level applied to the control input pins, A and B, one RF output port (for example, RF1) is set to on mode, by which an insertion loss path is provided from the input to the output. The other RF output ports (for example, RF2, RF3, and RF4) are then set to off mode, by which the outputs are isolated from the input. When the RF output ports (RF1, RF2, RF3, and RF4) are in isolation mode, they are internally terminated to 50 Ω, and thereby can absorb the applied RF signal. The ideal power-up sequence is as follows: 1. Power up GND. 2. Power up VDD. 3. Power up the digital control inputs. The relative order of the logic control inputs is not important. Powering the logic control inputs before the VDD supply can inadvertently forward bias and damage the internal ESD protection structures. 4. Apply the RF input. Table 7. Switch Mode Operation Digital Control Inputs Signal Mode A B RFC to RFx Low Low RF Port 1 is in on mode, providing a low insertion loss path from the RFC port to the RF1 port. The remaining RF ports (RF2, RF3, and RF4) are in off mode; they are isolated from the RFC port and internally terminated to a 50 Ω load. High Low RF Port 2 is in on mode, providing a low insertion loss path from the RFC port to the RF2 port. The remaining RF ports (RF1, RF3, and RF4) are in off mode; they are isolated from the RFC port and internally terminated to a 50 Ω load. Low High RF Port 3 is in on mode, providing a low insertion loss path from the RFC port to the RF3 port. The remaining RF ports (RF1, RF2, and RF4) are in off mode; they are isolated from the RFC port and internally terminated to a 50 Ω load. High High RF Port 4 is in on mode, providing a low insertion loss path from the RFC port to the RF4 port. The remaining RF ports (RF1, RF2, and RF3) are in off mode; they are isolated from the RFC port and internally terminated to a 50 Ω load. |
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