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ADC14161 датащи(PDF) 19 Page - National Semiconductor (TI) |
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ADC14161 датащи(HTML) 19 Page - National Semiconductor (TI) |
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19 / 20 page ![]() Applications Information (Continued) put alternates between 12 pF and 28 pF, depending upon the phase of the clock. This dynamic loaad is more difficult to drive than is a fixed capacitance. If the amplifier exhibits overshoot, ringing, or any evidence of instability, even at a very low level, it will degrade perfor- mance. Amplifiers that have been used sucessfully to dirve the analog inputs of the ADC14161 include the CLC427, CLC440, LM6152, LM6154, LM6181 and the LM6182. A small series reistor at each amplifier output and a capacitor across the analog inputs (as shown in Figure 7) will often im- prove performance. Operating with the reference pins outside of the speci- fied range. As mentioned in section 1.1, V REF should be in the range of 1.8V ≤ V REF ≤ 2.2V with V REF− IN ≤ 1.0V. Operating outside of these limits could lead to signal distortion. Using a clock source with excessive jitter, using exces- sively long clock signal trace, or having other signals coupled to the clock signal trace. This will cause the sam- pling interval to vary, causing excessive output noise and a reduction in SNR performance. Connecting pins marked ″NC″ to any potential. Some of these pins are used for factory testing. They should all be left floating. Connecting them to ground, power supply, or some other voltage could result in a non-functional device. www.national.com 19 |
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