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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ADC12048 датащи(PDF) 21 Page - National Semiconductor (TI) |
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ADC12048 датащи(HTML) 21 Page - National Semiconductor (TI) |
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21 / 30 page  Typical Performance Characteristics (See (Note 21), Electrical Characteristic Section) (Continued) Register Bit Description CONFIGURATION REGISTER (Write Only) This is a 13-bit write-only register that is used to program the functionality of the ADC12048. All data written to the ADC12048 will always go to this register only. The contents of this register cannot be read. MSB LSB b 12 b 11 b 10 b 9 b 8 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 BW COMMAND FIELD SYNC HB SE ACQ TIME MUX ADDRESS Power on State: 0100Hex b 3–b0: The MUX ADDRESS bits configure the analog input MUX. They select which input channels of the MUX will connect to the MUXOUT+ and MUXOUT− pins. (Refer to the MUX section for more details on the MUX.) Power-up value is 0000. TABLE 1. MUX Channel Assignment b 3 b 2 b 1 b 0 MUXOUT+ MUXOUT− 0000 CH0 CH1 0001 CH1 CH0 0010 CH2 CH3 0011 CH3 CH2 0100 CH4 CH5 0101 CH5 CH4 0110 CH6 CH7 0111 CH7 CH6 1000 CH0 COM 1001 CH1 COM 1010 CH2 COM 1011 CH3 COM 1100 CH4 COM 1101 CH5 COM 1110 CH6 COM 1111 CH7 COM b 5–b4: The ACQ TIME bits select one of four possible acquistion times in SYNC-OUT mode. (Refer to Selectable Acquisition Time section.) b 5 b 4 Clocks 00 9 01 15 10 47 11 79 b 6: When the Single-Ended bit (SE bit) is set, conversion results will be limited to positive values only and any negative conver- sion results will appear as a code of zero in the Data register. The SE bit is cleared at power-up. b 7: The High Byte bit (HB) is meaningful only in 8-bit mode (BW bit b12 = “0”) and is a don’t care condition in 13-bit mode (BW bit b 12 = “1”). This bit is used to access the upper byte of the Configuration Register in 8-bit mode. When this bit is set and bit b 12 = 0, the next byte written to the ADC12048 will program the upper byte of the Configuration register. The HB bit will automati- cally be cleared when data is written to the upper byte of the Configuration register, allowing the lower byte to be accessed with the next write. The HB bit is cleared at power-up. b 8: The SYNC bit. When the SYNC bit is set, the SYNC pin is programmed as an input and the converter is in synchronous mode. In this mode a rising edge on the SYNC pin causes the ADC to hold the input signal and begin a conversion. When b 15 cleared, the SYNC pin is programmed as an output and the converter is in an asynchronous mode. In this mode the signal at the SYNC pin indicates the status of the converter. The SYNC pin is high when a conversion is taking place. The SYNC bit is set at power-up. b 11–b9: The command field. These bits select the mode of operation of the ADC12048. Power-up value is 000. (See (Note 22)) www.national.com 21 |
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