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PI49FCT3807ASEX датащи(PDF) 3 Page - Pericom Semiconductor Corporation |
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PI49FCT3807ASEX датащи(HTML) 3 Page - Pericom Semiconductor Corporation |
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3 / 8 page ![]() PI49FCT3807 3.3V Fast CMOS Clock Driver 3 PS7010F 11/16/09 Power Supply Characteristics Parameters Description Test Conditions(1) Min. Typ(2) Max. Units ICC Quiescent Power Supply Current VCC = Max. VIN = GND or VCC —3 30 μA ΔICC Supply Current per Inputs @ TTL HIGH VCC = Max. VIN = VCC 0.6V(3) — 2.0 300 ICCD Supply Current per Input per MHz(4) VCC = Max., Outputs Open Per Output Toggling 50% Duty Cycle VIN = VCC VIN = GND — mA/ MHz Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at VCC = 3.3V, +25°C ambient. 3. Per TTL driven input (VIN = VCC – 0.6V); all other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the IC formula. These limits are guaranteed but not tested. Capacitance (TA = 25°C, f = 1 MHz) Parameters(1) Description Test Conditions Typ Max. Units CIN Input Capacitance VIN = 0V 4.5 6.0 pF COUT Output Capacitance VOUT = 0V 5.5 8.0 Notes: 1. This parameter is determined by device characterization but is not production tested. Maximum Switching Characteristics (Over operating range) Symbol Description Test Conditions 3807 3087A 3087B 3807C Units Com. Com. Com. Com. Min. Max. Min. Max. Min. Max. Min. Max. tPLH tPHL Propagation Delay A to BN CL = 15pF RL = 500Ω 1.5 4.5 1.5 4.0 1.5 3.8 1.5 3.5 ns tSK(O) Skew between two outputs of same package(3) 0.5 0.5 0.5 0.5 tSK(P) Skew between opposite tran- sitions of the same output (tPHL - tPHL)(3) 0.5 0.5 0.35 0.35 FIN Skew between outputs of different packages at the same power supply, temp. and speed grade(3) 1.0 1.0 0.75 0.75 Notes: 1. Other loading condition is described on page 4, “Test Circuits for All Outputs.” 2. These parameters are guaranteed by design. 3. Minimum propagation delay of 1.5ns is guaranteed by design. 09-0005 |
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