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PI6LC48P21 датащи(PDF) 5 Page - Pericom Semiconductor Corporation

номер детали PI6LC48P21
подробное описание детали  Single Output LVPECL Clock Generator
PDF  7 Pages
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производитель  PERICOM [Pericom Semiconductor Corporation]
домашняя страница  http://www.pericom.com
Logo PERICOM - Pericom Semiconductor Corporation

PI6LC48P21 датащи(HTML) 5 Page - Pericom Semiconductor Corporation

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PI6LC48P21
Rev. A
06/19/13
PI6LC48P21
Single Output LVPECL Clock Generator
50Ω
150Ω
0.01µF
Z = 50Ω
L = 0 ~ 10in
150Ω
Device
O
Z = 50Ω
O
50Ω
0.01µF
LVPECL Test Circuit
Power Supply Filtering Techniques
As in any high speed analog circuitry, the power supply pins are vulnerable to random noise. To achieve optimum jitter perfor-
mance, power supply isolation is required. The PI6LC48P21 provides separate power supplies to isolate any high switching noise
from the outputs to the internal PLL. VDD and VDDA should be individually connected to the power supply plane through vias, and
0.1μF bypass capacitors should be used for each pin. Figure below illustrates this for a generic VDD pin and also shows that VDDA
requires that an additional 10Ω resistor along with a 10μF bypass capacitor be connected to the VDDA pin.
VDD
0.1µF
0.1µF
10µF
10Ω *
3.3V or 2.5V
VDDA
* If VDD is 2.5V, the resistor value will be di erent, see app note for details
13-0096



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