2

PS9023A

11/20/09

PI6C49003

Networking Clock Generator

Pin Description

Pin #

Pin Name

Pin Type

Pin Description

Power

3.3V Supply Pin

2

IREF

Output

Connect to 475-Ohm resistor to set HCSL output drive current

3

NC

No connect. Leave open

4

NC

No connect. Leave open

Power

3.3V Supply Pin

Power

3.3V Supply Pin

7

GND

Power

Ground

8

GND

Power

Ground

Power

3.3V Supply Pin

10

GND

Power

Ground

11

Power

3.3V Supply Pin

12

SCLK

Input

SMBus compatible input clock. Supports fast mode 400kHz input clock.

13

SDATA

I/O

SMBus compatible data line

14

GND

Power

Ground

15

50M_Out1

Output

50MHz LVCMOS output. When disabled, output is trisated and has a nominal 110k-

Ohm pull-down.

16

50M_Out2

Output

50MHz LVCMOS output. When disabled, output is trisated and has a nominal 110k-

Ohm pull-down.

17

Power

3.3V Supply Pin

18

GND

Power

Ground

19

Power

3.3V Supply Pin

20

32.256M_Out1

Output

32.256MHz LVCMOS output. When disabled, output is trisated and has a nominal

110k-Ohm pull-down.

21

GND

Power

Ground

22

NC

23

NC

24

PD_RESET

Input

Power down reset - when low all PLL's are powered down and outputs tristated.

SMBus registers are reset to default values.

25

X1

Input

Crystal input. Integrated 6pF capacitance

26

X2

Output

Crystal output. Integrated 6pF capacitance

27

Power

3.3V Supply Pin

28

GND

Power

Ground

29

Power

3.3V Supply Pin

30

33/66/133M_Out1

Output

33/66/133MHz selectable LVCMOS output. When disabled, output is trisated and has

a nominal 110k-Ohm pull-down.

31

100M_Q4-

Output

100MHz HCSL output

32

100M_Q4+

Output

100MHz HCSL output

33

Power

3.3V Supply Pin

34

GND

Power

Ground

35

Power

3.3V Supply Pin

(Continued)

09-0097