#define READ_CNTR 0x60

#define READ_OTR 0x68

#define READ_STR 0x70

#define WRITE_MDR1 0x90

#define WRITE_MDR0 0x88

#define WRITE_DTR 0x98

#define LOAD_CNTR 0xE0

#define LOAD_OTR 0xE4

#define Slave_Select_Low PORTB &= ~(1 << PB4)

#define Slave_Select_High PORTB |= (1 << PB4)

/*Configure and initialize the SPI on PortB of uC*/

void init_spi_master(void)

{

SPCR = (0<<SPE);

// Disable SPI until PortB configuration

/* Port B (DDRB) PB7/SCK, PB5/MOSI, PB4/!SS outputs */

DDRB = (1<<DDB7)|(1<<DDB5)|(1<<DDB4);

// Define Outputs

Slave_Select_High;

// Disable Slave Select

/*** SPCR configuration***

*** CPOL = 0, CPHA = 0, Mode0***

*** DORD = 0, MSB first***

*** MSTR = 1, Master***

***SPE = 1, SPI enabled***

***SCK frequency = fosc/4***/

SPCR = (1<<SPE)|(1<<MSTR);

}

void load_rst_reg(unsigned char op_code)

//dataless write command

{

unsigned char spi_data;

Slave_Select_High;

// Keep SS/ High for LS7366 deselect

Slave_Select_Low;

// Switch SS/ low for new command

SPDR = op_code;

// Send command to LS7366

while (!(SPSR & (1<<SPIF)))

// Wait for end of the transmission

{

};

spi_data = SPDR;

// Reset SPIF

Slave_Select_High;

// Switch SS/ high for end of command

}

void singleByteWrite(unsigned char op_code, unsigned char data) //single byte write command

{

unsigned char spi_data;

Slave_Select_High;

// Keep SS/ High for LS7366 deselect

Slave_Select_Low;

// Switch SS/ low for new command

SPDR = op_code;

// Send command to LS7366

while (!(SPSR & (1<<SPIF)))

// Wait for end of the transmission

{

};

spi_data = SPDR;

// Reset SPIF

SPDR = data;

// Send data to be written to LS7366 register

while (!(SPSR & (1<<SPIF)))

// Wait for end of the transmission

7366R-080511-16