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TLP7920F датащи(PDF) 2 Page - Toshiba Semiconductor |
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TLP7920F датащи(HTML) 2 Page - Toshiba Semiconductor |
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2 / 11 page ![]() TLP7920,TLP7920F 2 5. 5. 5. 5. Pin Assignment Pin Assignment Pin Assignment Pin Assignment 5.1. 5.1. 5.1. 5.1. Pin Functions Pin Functions Pin Functions Pin Functions Pin No. 1 2 3 4 5 6 7 8 Symbol VDD1 VIN+ VIN- GND1 GND2 VOUT- VOUT+ VDD2 Description Input side supply voltage Positive input Negative input Input side ground Output side ground Negative output Positive output Output side supply voltage 6. 6. 6. 6. Internal Circuit (Note) Internal Circuit (Note) Internal Circuit (Note) Internal Circuit (Note) Note: A 0.1 µF bypass capacitor must be connected between 1 and 4 pins and between 5 and 8 pins. 7. 7. 7. 7. Principle of Operation Principle of Operation Principle of Operation Principle of Operation 7.1. 7.1. 7.1. 7.1. Mechanical Parameters Mechanical Parameters Mechanical Parameters Mechanical Parameters Characteristics Creepage distances Clearance Internal isolation thickness 7.62-mm Pitch TLP7920 7.0 (min) 7.0 (min) 0.4 (min) 10.16-mm Pitch TLP7920F 8.0 (min) 8.0 (min) 0.4 (min) Unit mm 2015-09-10 Rev.1.0 ©2015 Toshiba Corporation |
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