QUADRATURE CLOCK CONVERTER

FEATURES:

• x1 and x4 mode selection

• Up to 16MHz output clock frequency

• Programmable output clock pulse width

• On-chip filtering of inputs for optical or

magnetic encoder applications.

• TTL and CMOS compatible I/Os

• LS7083, LS7084 (DIP);

LS7083-S, LS7084-S (SOIC) -

See Figure 1

INPUT/OUTPUT DESCRIPTION:

RBIAS (Pin 1)

Input for external component connection. A resistor connected

between this input and VSS adjusts the output clock pulse width

(Tow). For proper operation, the output clock pulse width must be

Supply Voltage positive terminal.

Supply Voltage negative terminal

.

A (Pin 4)

Quadrature Clock Input A. This input has a filter circuit to validate

input logic level and eliminate encoder dither.

B (Pin 5)

Quadrature Clock Input B. This input has a filter circuit identical

to input A.

x4/x1 (Pin 6)

This input selects between x1 and x4 modes of operation. A high-

level selects x4 mode and a low-level selects the x1 mode. In x4

mode, an output pulse is generated for every transition at either

A or B input. In x1 mode, an output pulse is generated in one

combined A/B input cycle. (See Figure 2.)

LS7083 - DNCK (Pin 7)

In LS7083, this is the DOWN Clock Output. This output consists of

low-going pulses generated when A input lags the B input.

LS7084 - UP/DN (Pin 7)

In LS7084, this is the count direction indication output. When A in-

put leads the B input, the UP/DN output goes high indicating that

the count direction is UP. When A input lags the B input, UP/DN

output goes low, indicating that the count direction is DOWN.

LS7083 - UPCK (Pin 8)

In LS7083, this is the UP Clock output. This output consists of low-

going pulses generated when A input leads the B input.

LS7084N - CLK (Pin 8)

In LS7084, this is the combined UP Clock and DOWN Clock output.

The count direction at any instant is indicated by the UP/DN output

(Pin 7).

NOTE: For the LS7084, the timing of CLK and UP/DN requires that

the counter interfacing with

LS7084 counts on the rising edge of the

CLK pulses.

Applications:

• Interface incremental encoders to Up / Down Counters

(See Figure 6A and Figure 6B)

• Interface rotary encoders to Digital Potentiometers

(See Figure 7)

DESCRIPTION

The

LS7083 and LS7084 are CMOS quadrature clock convert-

ers. Quadrature clocks derived from optical or magnetic encod-

ers, when applied to the A and B inputs of the

LS7083 or

LS7084, are converted to strings of Up Clocks and Down Clocks

(

LS7083) or to a Clock and an Up/Down direction control

(

LS7084). These outputs can be interfaced directly with standard

Up/Down counters for direction and position sensing of the en-

January 2009

7083/84-011309-1

LSI/CSI

LSI Computer Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747 (631) 271-0400 FAX (631) 271-0405

LS7083

LS7084

UL

®

A3800

RBIAS

A

B

x4/x1

DNCK

UPCK

PIN ASSIGNMENT - TOP VIEW

CLK

UP/DN

FIGURE 1

1

2

3

4

8

7

6

5

RBIAS

A

B

x4/x1

1

2

3

4

8

7

6

5