SP6122ACUSLASHTR datasheet(7/19 Pages) SIPEX

7 / 19 page

Rev. 7/16/03

SP6122 Low Voltage, Micro 8, PFET, Buck Controller

Power On Reset (POR): continued

internal 1.25V is greater than the 1 V thresh-

old. Note this is a “loose” threshold and should

not be used to guarantee under voltage lock

out with respect to VCC. Care should be take

to ensure that VCC does not “get stuck” on the

way to its regulated value.

Soft Start

Soft start is required on step-down control-

lers to prevent excess inrush current through

the power train during start-up. On the

SP6122, this is managed through turning

the PFET switch on with a fixed frequency

clock and then turning the switch off when

divided down version of the output voltage

exceeds the internal SS voltage ramp. The

internal SS voltage ramp rises with a 0.5 V/

ms slew rate and the internal feedback

voltage follows this rate of change. The

presence of the output capacitor creates

extra current draw during startup. Since

dVOUT/dt creates an average sustained cur-

rent in the output capacitor, this current

must be considered while calculating peak

inrush current and over current thresholds.

An expression to determine the excess in-

rush current due to the dVOUT/dt of the

output capacitor is:

ICOUT = COUT*0.5 V/ms *

VOUT ,

where VR is the internal reference voltage.

Lock Up & Hiccup Modes

As previously stated, if the SP6122 detects

an over current condition and initiates a

fault, the power supply remains “locked up”.

That is, the FFLAG pin immediately pulls

low (if loaded) and the PFET switch turns

off. This condition is permanent unless the

either the VCC or ENABLE is cycled. How-

ever if FFLAG is tied to ENABLE, the SP6122

will restart without assistance (Hiccup

Mode). Furthermore, the restart time can be

controlled by the addition of a small capaci-

tor on the ENABLE pin to ground. The

restart time is equal to the amount of time it

takes for the 5µA ENABLE pin current to

charge the external capacitor to an NFET

threshold (roughly 1V). The waveforms that

describe the Hiccup Mode operation are

shown below.

TIME

SWN

Voltage

V(VIN)

Inductor

Current

ILOAD

Comparator

Reference

Voltage

1.25V

0.25V

Voltage

dVSS/dt = 0.5Vms

VISET - VISENSE

1.0V

V(VCC)

FFLAG

Voltage

ENABLE

Voltage

150mV

TIME

dVENABLE/dt = 4µA/CENABLE

PDRV

Voltage

V(VCC)

THEORY OF OPERATION: Continued

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