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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SP6122 датащи(PDF) 14 Page - Sipex Corporation |
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SP6122 датащи(HTML) 14 Page - Sipex Corporation |
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14 / 19 page  14 Rev. 7/16/03 SP6122 Low Voltage, Micro 8, PFET, Buck Controller © Copyright 2003 Sipex Corporation PSH(MAX) ≅ 1/2 IOUT(MAX)VIN(MAX)(tRISE + tFALL)FS where tRISE (SP6122) for 8A PMOS is typi- cally 20ns and tFALL (SP6122) for 8A PMOS is typically 40ns. Switching losses need to be taken into account for high switching frequency, since they are directly proportional to switching frequency. The conduction losses associ- ated with the PMOS is determined by: PCH(MAX) = IOUT (MAX) 2 RDS(ON) D Where RDS(ON) = drain to source on resis- tance. The total power losses of the PMOS are the sum of switching and conduction losses. For input voltages of 3.3V and 5V, conduc- tion losses often dominate switching losses. Therefore, lowering the RDS(ON) of the PMOS always improves efficiency even though it gives rise to higher switching losses due to increased CRSS. For the SP6122 design example, the Fairchild PMOS PDS6375 was selected for its low RDS(ON) and good switching charac- teristics including low gate charge at the 3.3V input. Using table 1 values for RDS(ON) and tRISE and tFALL for the SP6122, we calculate; PSH(MAX) = 119mW and PCH(MAX) = 203mW. RDS(ON) varies greatly with the gate driver voltage. The MOSFET vendors often specify RDS(ON) on multiple gate to source voltages (VGS), as well as provide typical curve of RDS(ON) versus VGS. For 5V input, use the RDS(ON) specified at 4.5V VGS. At the time of this publication, vendors, such as Fairchild, Siliconix and International Rectifier, have started to specify RDS(ON) at VGS less than 3V. This has provided necessary data for designs in which these MOSFETs are driven with 3.3V and made it possible to use SP6122 in 3.3V only applications. Thermal calculation must be conducted to ensure the MOSFET can handle the maxi- mum load current. The junction tempera- ture of the MOSFET, determined as follows, must stay below the maximum rating. TJ(MAX) = TA (MAX) + PMOSFET(MAX) RθJA where TA (MAX) = maximum ambient temperature PMOSFET(MAX) = maximum power dissipation of the MOSFET, including both switching and conduction losses RθJA = junction to ambient thermal resistance. RθJA of the device depends greatly on the board layout, as well as device package. Significant thermal improvement can be achieved in the maximum power dissipation through the proper design of copper mount- ing pads on the circuit board. For example, in a SO-8 package, placing two 0.04 square inches copper pad directly under the pack- age, without occupying additional board space, can increase the maximum power from approximately 1 to 1.2W. For the PMOS PDS6375, assuming TA (MAX) = 20°C, PMOSFET(MAX) = PSH(MAX) + PCH(MAX) = 321mW, and assuming per PDS6375 data sheet, RθJA = 50°C/W if using 0.5 in2 pad of 2oz Cu, TJ(MAX) = 36°C which is only a 16°C rise from ambient. SCHOTTKY DIODE SELECTION The schottky diode is selected for low for- ward voltage, current capability and fast switching speed. The average power dissi- pation of the schottky diode is determined by PDIODE = VF IOUT (1- D) Where VF is the forward voltage of the Schottky diode at IOUT. APPLICATION INFORMATION: Continued |
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