AD8284WCSVZ datasheet(13/28 Pages) AD

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Data Sheet

AD8284

Rev. D | Page 13 of 28

Figure 15. Simplified Block Diagram

CHANNEL OVERVIEW

The AD8284 contains a four-input mux, an LNA, a PGA, and

an AAF in the signal path, as shown in Figure 15. The signal

chain input impedance can be either 200 Ω or 200 kΩ. The

PGA has selectable gains that result in channel gains ranging

from 17 dB to 35 dB. The AAF has a three-pole elliptical

response with a selectable cutoff frequency from 9 MHz to

15 MHz. The signal path is fully differential throughout to

maximize signal swing and reduce even-order distortion. The

LNA is designed to be driven from either a differential or

single-ended signal source.

Multiplexer

The AD8284 has a multiplexer (mux) at the input to switch as

many as four differential channels into the signal chain. The

active mux channel is controlled by the SPI port or by using the

external pins, MUX[0] and MUX[1]. The relationship between

the input code and the selected mux channel is listed in Table 7.

Table 7. Digital Input Values to Select the Active ADC

Channel

AUX

MUX[1]

MUX[0]

Active Channel

AUX

The external pins are the default method for selecting the active

mux channel but the SPI Register 0x0C can also control the

mux. Bit 3 of Register 0x0C specifies whether the SPI or the

external pins control the mux.

Low Noise Amplifier

Good noise performance relies on a proprietary ultralow noise

LNA at the beginning of the signal chain; the LNA minimizes the

noise contributions from the PGA and AAF that are next in the

signal chain. The input impedance can be either 200 Ω or

200 kΩ, the value of which is selected through the SPI port or by

the ZSEL pin.

The LNA supports differential output voltages as high as 5.0 V p-p

with positive and negative excursions of ±1.25 V from a common-

mode voltage of 1.5 V. Because the output saturation level is

fixed, the channel gain sets the maximum input signal before

saturation.

Low value feedback resistors and the current driving capability

of the output stage allow the LNA to achieve a low input referred

noise voltage of 3.5 nV/√Hz at a channel gain of 35 dB. The use

of a fully differential topology and negative feedback minimizes

second-order distortion. Differential signaling enables smaller

swings at each output, further reducing third-order distortion.

Recommendation

To achieve the best possible noise performance, it is important

to match the impedances seen by the positive and negative

inputs. Matching the impedances ensures that the signal path

rejects any common-mode noise.

INA+

INA–

INB+

INC+

INC–

INB–

IND+

IND–

INADC+

INADC–

SPI

AD8284

SATURATION

DETECTION

REFERENCE

D11

12-BIT

ADC

MUX

LNA

MUX

PGA

AAF

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