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LM5107SD датащи(PDF) 6 Page - Texas Instruments

номер детали LM5107SD
подробное описание детали  1.4A Peak Half Bridge Gate Driver
PDF  20 Pages
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
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LM5107SD датащи(HTML) 6 Page - Texas Instruments

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LI
HI
tHPLH
tLPLH
tHPHL
tLPHL
LO
HO
LI
HI
tMOFF
tMON
LO
HO
6
LM5107
SNVS333E – NOVEMBER 2004 – REVISED MARCH 2016
www.ti.com
Product Folder Links: LM5107
Submit Documentation Feedback
Copyright © 2004–2016, Texas Instruments Incorporated
(1)
Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation
using Statistical Quality Control (SQC) methods. Limits are used to calculate Average Outgoing Quality Level (AOQL).
6.5
Switching Characteristics
Specifications in standard typeface are for TJ = +25°C, and those in boldface type apply over the full operating junction
temperature range. Unless otherwise specified, VDD = VHB = 12V, VSS = VHS = 0V, No Load on LO or HO.
Symbol
Parameter
Conditions
Min(1)
Typ
Max(1)
Units
LM5100A
tLPHL
Lower Turn-Off Propagation Delay
(LI Falling to LO Falling)
27
56
ns
tHPHL
Upper Turn-Off Propagation Delay
(HI Falling to HO Falling)
27
56
ns
tLPLH
Lower Turn-On Propagation Delay
(LI Rising to LO Rising)
29
56
ns
tHPLH
Upper Turn-On Propagation Delay
(HI Rising to HO Rising)
29
56
ns
tMON
Delay Matching: Lower Turn-On and Upper
Turn-Off
2
15
ns
tMOFF
Delay Matching: Lower Turn-Off and Upper
Turn-On
2
15
ns
tRC, tFC
Either Output Rise/Fall Time
CL = 1000 pF
15
-
ns
tPW
Minimum Input Pulse Width that Changes
the Output
50
ns
tBS
Bootstrap Diode Turn-Off Time
IF = 100 mA, IR = 100 mA
105
ns
Figure 1. Timing Diagram



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