54FCT373

General Description

The ’FCT373 consists of eight latches with TRI-STATE out-

puts for bus organized system applications. The flip-flops ap-

pear transparent to the data when Latch Enable (LE) is

HIGH. When LE is LOW, the data that meets the setup times

is latched. Data appears on the bus when the Output Enable

(OE) is LOW. When OE is HIGH the bus output is in the high

impedance state.

Features

n TRI-STATE outputs for bus interfacing

n TTL input and output level compatible

n CMOS power consumption

n Output sink capability of 32 mA, source capability of

12 mA

n Standard Microcircuit Drawing (SMD) 5962-8764401

Ordering Code

Military

Package Number

Package Description

54FCT373DMQB

J20A

20-Lead Ceramic Dual-In-Line

54FCT373FMQB

W20A

20-Lead Cerpack

54FCT373LMQB

E20A

20-Lead Ceramic Leadless Chip Carrier, Type C

Connection Diagrams

Pin Names

Description

D

Data Inputs

LE

Latch Enable Input

(Active HIGH)

OE

Output Enable Input

(Active LOW)

O

TRI-STATE Latch

Outputs

Pin Assignment

for DIP and Flatpak

DS100957-1

Pin Assignment

for LCC

DS100957-2

October 1999

© 1999 National Semiconductor Corporation

DS100957

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