2

SCD5902 Rev B 3/25/13

Aeroflex Plainview

16-Pin SOIC

OUT_D

-IN_D

+IN_D

-IN_C

OUT_C

EN_CD

OUT_A

-IN_A

+IN_A

VCC

+IN_B

-IN_B

OUT_B

EN_AB

RHD5902

VEE

+IN_C

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

Notes:

1. Package and Lid are electrically isolated from signal pads.

2. It is recommended that the Lid be grounded to prevent any ESD or static buildup.

3. EN_AB enables amplifiers A & B. EN_CD enables amplifiers C & D.

OUT_A

OUT_B

OUT_C

OUT_D

+IN_A

-IN_A

+IN_B

-IN_B

EN_AB

+IN_C

-IN_C

+IN_D

-IN_D

EN_CD

3

2

5

6

8

12

11

14

15

9

16

10

7

1

A

B

C

D

13

4

VCC

VEE

FIGURE 1: BLOCK DIAGRAM

FIGURE 2: PACKAGE PIN-OUT

Pin

Signal Name

Definition

1OUT_A

Output of Amplifier A.

2

-IN_A

Inverting input of Amplifier A.

3

+IN_A

Non-Inverting input of Amplifier A.

4

VCC

+ Voltage Supply.

5

+IN_B

Non-Inverting input of Amplifier B.

6

-IN_B

Inverting input of Amplifier B.

7OUT_B

Output of Amplifier B.

8EN_AB

A Logic Low will disable Amplifiers A & B

so that the outputs are high impedance.

9EN_CD

A Logic Low will disable Amplifiers C & D

so that the outputs are high impedance.

10

OUT_C

Output of Amplifier C.

11

-IN_C

Inverting input of Amplifier C.

12

+IN_C

Non-Inverting input of Amplifier C.

13

VEE

- Voltage Supply.

14

+IN_D

Non-Inverting input of Amplifier D.

15

-IN_D

Inverting input of Amplifier D.

16

OUT_D

Output of Amplifier D.

TABLE 1: PIN-OUT DESCRIPTION