GS2971 datasheet(86/148 Pages) SEMTECH

86 / 148 page

GS2971 3Gb/s, HD, SD SDI Receiver

Data Sheet

45898 - 2

September 2012

86 of 148

When the IGNORE_PHASE bit in the host interface is set HIGH, it is recommended that

the M value be programmed via the host interface. This can be done by setting the

FORCE_M bit HIGH, and programming the desired value into FORCE_MEQ1001. The

correct value can be obtained by reading the M bit from the Video Core Registers.

If the DDPS is locked to phase data and audio data packets are lost or corrupted, the

Clock Generator will flywheel for up to four audio data packets. If no valid audio data

packet with valid phase data is provided within this time, the Clock Generator will

free-run based on the video format, the PCLK and the M value.

If the IGNORE_PHASE bit in the host interface is HIGH, the clock will free-run based on

the video format, the PCLK and the M value, independent of the NO_PHASEA_DATA bit.

In the 720p/24 video format, the total line length is 4125 pixels, which requires a

resolution of 13 bits for the audio clock phase words in the embedded audio data

packets. SMPTE 299M only specifies a maximum of 12 bits resolution. Proposed changes

to SMPTE 299M suggest using bit 5 of UDW1 (currently reserved and set to zero) in the

audio data packet as the MSB (ck13) for the audio clock phase data, providing 13 bits

resolution.

Some audio encoders may hold the clock phase value at a maximum value when

reached, until reset at the end of the line. This produces a small amount of audio phase

jitter for the period of one sample.

To overcome this issue, the audio de-embedder checks for all cases. On detection of the

maximum value, a comparison is made between previous clock phases and the correct

position interpolated. If the clock phase data value starts to decrease, the de-embedder

checks to see if bit 5 (ck13) of UDW1 in the audio data packet is set. If ck13 is set, the

correct value is used. If ck13 is not set, the correct position is interpolated.

4.19.3.2 Detect 5-Frame Sequence Block

5-frame sequence detection is required for 525-line based video formats only. The audio

de-embedder checks the Audio Frame Number sequence in the audio control packets,

when present. If the audio frame sequence is running (repeated 1 to 5 count), the audio

de-embedder uses this information to determine the 5-frame sequence. If the audio

control packet is not present, or the Audio Frame Number words are set to 200h, the

audio de-embedder detects the 5-frame sequence by counting the number of samples

per frame. Figure 4-43 shows the number of samples per frame over a 5-frame

sequence.

Figure 4-43: Sample Distribution over 5 Video Frames (525-line Systems)

When the audio inputs are asynchronously switched or disrupted, the audio

de-embedder continues to write audio samples into the audio buffer, based on the

Frame1

1602

1601

8008 Samples

1602 Repeat

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