Unused Input

Input

Output

Output

Input

Unused Input

Frequency - MHz

0

20

40

60

80

0

1

2

3

4

5

6

7

8

9

10

D003

Icc 1.8V

Icc 2.5V

Icc 3.3V

Icc 5V

SN74LVC1G19

SCES464G – JUNE 2003 – REVISED AUGUST 2015

www.ti.com

Typical Application (continued)

9.2.3 Application Curve

10 Power Supply Recommendations

The power supply can be any voltage between the minimum and maximum supply voltage rating located in

Absolute Maximum Ratings table.

supply, a 0.1-

capacitors are recommended for each power terminal. It is ok to parallel multiple bypass capacitors to reject

different frequencies of noise. Multiple bypass capacitors may be paralleled to reject different frequencies of

noise. The bypass capacitor must be installed as close to the power terminal as possible for the best results.

11 Layout

11.1 Layout Guidelines

When using multiple bit logic devices, inputs must not float. In many cases, functions or parts of functions of

digital logic devices are unused. Some examples are when only two inputs of a triple-input AND gate are used,

or when only 3 of the 4-buffer gates are used. Such input pins must not be left unconnected because the

undefined voltages at the outside connections result in undefined operational states.

Specified in Figure 7 are rules that must be observed under all circumstances. All unused inputs of digital logic

devices must be connected to a high or low bias to prevent them from floating. The logic level that must be

applied to any particular unused input depends on the function of the device. Generally they will be tied to GND

11.2 Layout Example

Figure 7. Layout Diagram

12

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