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SN54HC74 датащи(PDF) 13 Page - Texas Instruments

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номер детали SN54HC74
подробное описание детали  Dual D-Type Positive-Edge-Triggered Flip-Flops
PDF  15 Pages
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
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SN54HC74 датащи(HTML) 13 Page - Texas Instruments

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Vcc
Unused Input
Input
Output
Input
Unused Input
Output
SN54HC74, SN74HC74
www.ti.com
SCLS094E – DECEMBER 1982 – REVISED DECEMBER 2015
11 Layout
11.1 Layout Guidelines
When using multiple bit logic devices, inputs should not float. In many cases, functions or parts of functions of
digital logic devices are unused. Some examples are when only two inputs of a triple-input AND gate are used,
or when only 3 of the 4-buffer gates are used. Such input pins should not be left unconnected because the
undefined voltages at the outside connections result in undefined operational states.
Specified in Figure 6 are rules that must be observed under all circumstances. All unused inputs of digital logic
devices must be connected to a high or low bias to prevent them from floating. The logic level that must be
applied to any particular unused input depends on the function of the device. Generally they are tied to GND or
VCC, whichever makes more sense or is more convenient. It is acceptable to float outputs unless the part is a
transceiver. If the transceiver has an output enable pin, it disables the output section of the part when asserted.
This pin keeps the input section of the I/Os from being disabled and floated.
11.2 Layout Example
Figure 6. Layout Diagram
Copyright © 1982–2015, Texas Instruments Incorporated
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