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LSF0102 датащи(PDF) 9 Page - Texas Instruments |
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LSF0102 датащи(HTML) 9 Page - Texas Instruments |
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9 / 39 page ![]() NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR ≤ ≤ ≤ 10 MHz, Z = 50 t 2 ns, t O r f Ω, 2ns. C. The outputs are measured one at a time, with one transition per measurement. From Output Under Test CL (see Note A) LOAD CIRCUIT TRANSLATING UP TRANSLATING DOWN RL Translating up Translating down S1 S2 USAGE SWITCH VM VM 3.3 V VIL Input VM VM 5 V VOL Output VM VM 5 V VIL Input VM VM 2 V VOL Output VT S1 S2 Open 9 LSF0101, LSF0102, LSF0108 www.ti.com SDLS966G – DECEMBER 2013 – REVISED FEBRUAURY 2016 Product Folder Links: LSF0101 LSF0102 LSF0108 Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated 7 Parameter Measurement Information Figure 2. Load Circuit for Outputs |
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