C508 datasheet(39/93 Pages) INFINEON

39 / 93 page

C508

Data Sheet

2000-08

Further, the initial logic output level of the CAPCOM channel outputs can be selected in

compare mode. This allows waveforms to be generated with inverting signal polarities.

The compare unit COMP is a 10-bit compare unit which can be used to generate a pulse

width modulated signal. This PWM output signal drives the output pin COUT3. In burst

mode and in the PWM modes the output of the COMP unit can be switched to the

COUTx outputs.

The block commutation control logic allows to generate versatile multi-channel PWM

output signals. In one of these modes, the block commutation mode, signal transitions

at the three external interrupt inputs are used to trigger the PWM signal generation logic.

Depending on these signal transitions, the six I/O lines of the CAPCOM unit, which are

decoupled in block commutation mode from the three capture/compare channels, are

driven as static or PWM modulated outputs. CAPCOM channel 0 can be used in block

commutation mode for a capture operation (speed measurement) which is triggered by

each transition at the external interrupt inputs.

Further, the multi-channel PWM mode signal generation can be also triggered by the

period of Compare Timer 1. These operating modes are referenced as multi-channel

PWM modes.

Using the CTRAP input signal of the C508, the compare outputs can be put immediately

into their state as defined in COTRAP register.

The CCU unit has four main interrupt sources with their specific interrupt vectors.

Interrupts can be generated at the Compare Timer 1 period match or count-change

events, at the Compare Timer 2 period match event, at a CAPCOM compare match or

capture event, and at a CAPCOM emergency event. An emergency event occurs if an

active CTRAP signal is detected or if an error condition in block commutation mode is

detected. All interrupt sources can be enabled/disabled individually.

Table 6

Resolution and Period of the Compare Timer 1 (at

fOSC = 10 MHz)

Compare

Timer 1

Input

Clock

Operating Mode 0

Operating Mode 1

Resolution

Period

Resolution

Period

fOSC

fOSC / 2

fOSC / 4

fOSC / 8

fOSC / 16

fOSC / 32

fOSC / 64

50 ns

100 ns

200 ns

400 ns

800 ns

1.6

µs

3.2

µs

6.4

µs

100 ns - 3.28 ms

200 ns - 6.55 ms

400 ns - 13.11 ms

800 ns - 26.21 ms

1.6

µs - 52.43 ms

3.2

µs - 104.86 ms

6.4

µs - 209.72 ms

12.8

µs - 419.43 ms

50 ns

100 ns

200 ns

400 ns

800 ns

1.6

µs

3.2

µs

6.4

µs

200 ns - 6.55 ms

400 ns - 13.11 ms

800 ns - 26.21 ms

1.6

µs - 52.43 ms

3.2

µs - 104.86 ms

6.4

µs - 209.71 ms

12.8

µs - 419.42 ms

25.6

µs - 838.85 ms

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