M24C32-DRMF3TP datasheet(18/40 Pages) STMICROELECTRONICS

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Instructions

M24C32-A125

18/40

DocID023377 Rev 6

4.1.3

Write Identification Page

The Identification Page (32 bytes) is an additional page which can be written and (later)

permanently locked in Read-only mode. It is written by issuing the Write Identification Page

instruction. This instruction uses the same protocol and format as Page Write (into memory

array), except for the following differences:

•

Device type identifier = 1011b

•

Most significant address bits A15/A5 are don't care, except for address bit A10 which

must be “0”. Least significant address bits A4/A0 define the byte location inside the

Identification page.

If the Identification page is locked, the data bytes transferred during the Write Identification

Page instruction are not acknowledged (NoAck).

4.1.4

Lock Identification Page

The Lock Identification Page instruction (Lock ID) permanently locks the Identification page

in Read-only mode. The Lock ID instruction is similar to Byte Write (into memory array) with

the following specific conditions:

•

Device type identifier = 1011b

•

Address bit A10 must be ‘1’; all other address bits are don't care

•

The data byte must be equal to the binary value xxxx xx1x, where x is don't care

4.1.5

Minimizing Write delays by polling on ACK

The maximum Write time (tw) is shown in AC characteristics tables in Section 8: DC and AC

parameters, but the typical time is shorter. To make use of this, a polling sequence can be

used by the bus master.

The sequence, as shown in Figure 7, is:

•

Initial condition: a Write cycle is in progress.

•

Step 1: the bus master issues a Start condition followed by a device select code (the

first byte of the new instruction).

•

Step 2: if the device is busy with the internal Write cycle, no Ack will be returned and

the bus master goes back to Step 1. If the device has terminated the internal Write

cycle, it responds with an Ack, indicating that the device is ready to receive the second

part of the instruction (the first byte of this instruction having been sent during Step 1).

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