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TMD27721 датащи(PDF) 11 Page - ams AG |
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TMD27721 датащи(HTML) 11 Page - ams AG |
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11 / 59 page ![]() ams Datasheet, Confidential Page 11 [v1-20] 2014-Jul-21 Document Feedback TMD2772/ TMD2772WA − Timing Characteristics Figure 15: AC Electrical Characteristics, VDD = 3V, TA = 25°C (unless otherwise noted) Note(s) and/or Footnote(s): 1. Specified by design and characterization; not production tested. Timing Diagrams Figure 16: Parameter Measurement Information Parameter (1) Conditions Min Max Unit fSCL Clock frequency (I²C only) 0 400 kHz tBUF Bus free time between start and stop condition 1.3 μs tHD;STA Hold time after (repeated) start condition. After this period, the first clock is generated. 0.6 μs tSU;STA Repeated start condition setup time 0.6 μs tSU;STO Stop condition setup time 0.6 μs tHD;DAT Data hold time 10 ns tSU;DAT Data setup time 100 ns tLOW SCL clock low period 1.3 μs tHIGH SCL clock high period 0.6 μs tF Clock/data fall time 300 ns tR Clock/data rise time 300 ns Ci Input pin capacitance 10 pF Timing Characteristics START START STOP STOP tBUF tLOW tHD; STA tR tF VIH VIL VIH VIL tSU; DAT tSU; STA tHD; DAT tHIGH tSU; STO SCL SDA |
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