TDC-GP21 datasheet(74/91 Pages) AMSCO

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TDC-GP21

acam messelectronic gmbh - Friedrich-List-Str.4 - 76297 Stutensee - Germany - www.acam.de

5-3

The low-power clock can be internally forwarded to an output pin to be available for an

external microprocessor. The possible settings are:

SEL_TSTO1 = 7:

32 kHz output at pin FIRE_IN

SEL_TSTO2 = 7:

4 kHz (32 kHz/8) output at pin EN_START

It is also possible to provide an external

low-frequency rectangular clock at the

CLK32Out pin (3.6 V max.).

External

32kHz

Figure 5.3

5.1.3

Calibrating a Ceramic High-speed Oscillator

Using a ceramic oscillator for the 2 to 8 MHz clock will be attractive because it is of low

cost and has a fast settling time. Unfortunately it has a poor tolera nce of 0.3 to 0.5 %

and shows a temperature drift. For this reason the TDC-GP21 allows to execute a

calibration measurement that allows to compensate this behavior. This measurement is

based on the very precise 32.768 kHz clock. The TDC-GP21 generates start/stop pulses

from the 32.768 kHz and measures this time interval with its TDC unit. The result is

stored in the result register and the interrupt flag is set. The frequency error of the

ceramic resonator can be calculated by the microprocessor. The calibration is configured

by setting register 0, ANZ_PER_CALRES and is started with “START_Cal_Resonator“ -

instruction by the microprocessor.

The time interval to be measured is set by ANZ_PER_CALRES which defines the number of

periods of the 32.768 kHz clock:

ANZ_PER_CALRES

= 0

2 periods =

61.035 µs

= 1

4 periods = 122.070 µs

= 2

8 periods = 244.140 µs

= 3

16 periods = 488.281µs

The results is given in multiples of the high-speed clock and (divided by 1, 2 or 4

(DIV_CLKHS)) as 32 bit fixed point numbers with 16 integer bits and 16 fractional bits.

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