C

C

OUT

IN

REF

AIN

Microcontroller

ADC Input

Via to

GND Plane

Via to

Input Power

GND

Input Signal

REF3312, REF3318, REF3320, REF3325, REF3330, REF3333

SBOS392E – AUGUST 2007 – REVISED OCTOBER 2014

www.ti.com

12 Layout

12.1 Layout Guidelines

For optimal performance of this design, follow standard printed circuit board (PCB) layout guidelines, including

proper decoupling close to all integrated circuits and adequate power and ground connections with large copper

pours. Select a PCB size with connectors that connect directly to the MSP430 LaunchPad™.

Figure 25 illustrates an example of a PCB layout for a data acquisition system using the REF33xx.

Some key considerations are:

•

Connect a low-ESR, 1-

μF ceramic capacitor at the IN pin for bypass, and a 0.1µF to 10µF ceramic capacitor

at the OUT pin for stability of the REF33xx.

•

Decouple other active devices in the system per the device specifications.

•

Use a solid ground plane helps distribute heat and reduces EMI noise pickup.

•

Place the external components as close to the device as possible. This configuration prevents parasitic errors

(such as the Seebeck effect) from occurring.

•

Minimize trace length between the reference and bias connections to the ADC to reduce noise pickup.

•

Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if

possible, and only make perpendicular crossings when absolutely necessary.

12.2 Layout Example

Figure 25. Layout Example

18

Submit Documentation Feedback

Copyright © 2007–2014, Texas Instruments Incorporated

Product Folder Links: REF3312 REF3318 REF3320 REF3325 REF3330 REF3333