13

Z86C63/64

CPS DC-5461-02

PRELIMINARY

AC CHARACTERISTICS

External I/O or Memory Read and Write Timing

Z86C63/64 (20 MHz—Standard Mode Only[4])

T

to +70

to +105

20 MHz

20 MHz

No

Symbol

Parameter

Min

Max

Min

Max

Units

Notes

1

TdA(AS)

Address Valid to /AS rise Delay

15

25

ns

[2,3]

2

TdAS(A)

/AS rise to Address Float Delay

25

35

ns

[2,3]

3

TdAS(DR)

/AS rise to Read Data Req’d Valid

120

120

ns

[1,2,3]

4

TwAS

/AS Low Width

30

30

ns

[2,3]

5

TdAZ(DS)

Address Float to /DS fall

0

0

ns

6

TwDSR

/DS (Read) Low Width

105

105

ns

[1,2,3]

7

TwDSW

/DS (Write) Low Width

65

65

ns

[1,2,3]

8

TdDSR(DR)

/DS fall to Read Data Req’d Valid

55

55

ns

[1,2,3]

9

ThDR(DS)

Read Data to /DS rise Hold Time

0

0

ns

[2,3]

10

TdDS(A)

/DS rise to Address Active Delay

40

40

ns

[2,3]

11

TdDS(AS)

/DS rise to /AS fall Delay

25

25

ns

[2,3]

12

TdR/W(AS)

R//W Valid to /AS rise Delay

20

20

ns

[2,3]

13

TdDS(R/W)

/DS rise to R//W Not Valid

25

25

ns

[2,3]

14

TdDW(DSW)

Write Data Valid to /DS fall (Write) Delay

20

20

ns

[2,3]

15

TdDS(DW)

/DS rise to Write Data Not Valid Delay

25

25

ns

[2,3]

16

TdA(DR)

Address Valid to Read Data Req’d Valid

150

150

ns

[1,2,3]

17

TdAS(DS)

/AS rise to /DS fall Delay

35

35

ns

[2,3]

18

TdDM(AS)

/DM Valid to /AS rise Delay

15

15

ns

[2,3]

Notes:

[1] When using extended memory timing add 2 TpC.

[2] Timing numbers given are for minimum TpC.

[3] See clock cycle dependent characteristics table.

[4] Low EMI is not selected.

Standard Test Load

All timing references use 2.0 V for a logic 1 and 0.8 V for a logic 0.