SM8702AM

NIPPON PRECISION CIRCUITS—16

NIPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to

improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility fo r

the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits

are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision

Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without fur ther testing or modification.

The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or

malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter,

including compliance with expor t controls on the distribution or dissemination of the products. Customers shall not expor t, directly or

indirectly, any products without first obtaining required licenses and approvals from appropriate gover nment agencies.

NIPPON PRECISION CIRCUITS INC.

4-3, Fukuzumi 2-chome

Koto-ku, Tokyo 135-8430, Japan

Telephone: 03-3642-6661

Facsimile: 03-3642-6698

NP9907AE

1999.07

NIPPON PRECISION CIRCUITS INC.

Byte 3: SDRAM register

Byte 4: Reserved register

Byte 5: REF/IOAPIC register

Bit

Pin

n umber

P o w e r-ON

1. 1 = enabled, 0 = disabled

Notes

7

–

1

(Reser ved)

6

–

1

(Reser ved)

5

–

1

(Reser ved)

4

–

1

(Reser ved)

3

17, 18

1

SDRAM[10:11] enable in

desktop mode only (MODE =

HIGH)

2

20, 21, 40,

41

1

SDRAM[8,9,12,13] enable

1

28, 29, 31,

32

1

SDRAM[4:7] enable

0

34, 35, 37,

38

1

SDRAM[0:3] enable

Bit

Pin

n umber

P o w e r-ON

1. 1 = enabled, 0 = disabled

Notes

7

–

1

(Reser ved)

6

–

1

(Reser ved)

5

–

1

(Reser ved)

4

–

1

(Reser ved)

3

–

1

(Reser ved)

2

–

1

(Reser ved)

1

–

1

(Reser ved)

0

–

1

(Reser ved)

Bit

Pin

n umber

P o w e r-ON

1. 1 = enabled, 0 = disabled

Notes

7

–

1

(Reser ved)

6

–

1

(Reser ved)

5

–

1

(Reser ved)

4

4 7

1

IOAPIC enable

3

–

1

(Reser ved)

2

–

1

(Reser ved)

1

4 6

1

REF1 enable

0

2

1

REF0 enable